[TG3]: Workaround 5752 A0 chip ID

The 5752 A0 chip ID is wrong in hardware. The simplest way to workaround
it is to change it to the correct value in tp->pci_chip_rev_id. This
way, it is easier to check for the ASIC_REV_5752 in the rest of the
driver.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index f0b5dc7766bb5b1fd27ee977652b62b8c113a86e..a4d0d61d6af051a72638f63b67b83471a1d6a88e 100644 (file)
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7952,6 +7952,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
        tp->pci_chip_rev_id = (misc_ctrl_reg >>
                               MISC_HOST_CTRL_CHIPREV_SHIFT);
 
+       /* Wrong chip ID in 5752 A0. This code can be removed later
+        * as A0 is not in production.
+        */
+       if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
+               tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
+
        /* Initialize misc host control in PCI block. */
        tp->misc_host_ctrl |= (misc_ctrl_reg &
                               MISC_HOST_CTRL_CHIPREV);
@@ -7967,8 +7973,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
        tp->pci_bist         = (cacheline_sz_reg >> 24) & 0xff;
 
        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
-           GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A0 ||
-           GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A1)
+           GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
                tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
 
        if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||

diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 4732a804974b1a298b185565aa3ef0b85d0780d6..3f7cd6fb8891a4148a4163671064fbe94f0016c0 100644 (file)
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -125,7 +125,8 @@
 #define  CHIPREV_ID_5750_A0             0x4000
 #define  CHIPREV_ID_5750_A1             0x4001
 #define  CHIPREV_ID_5750_A3             0x4003
-#define  CHIPREV_ID_5752_A0             0x5000
+#define  CHIPREV_ID_5752_A0_HW          0x5000
+#define  CHIPREV_ID_5752_A0             0x6000
 #define  CHIPREV_ID_5752_A1             0x6001
 #define  GET_ASIC_REV(CHIP_REV_ID)     ((CHIP_REV_ID) >> 12)
 #define   ASIC_REV_5700                         0x07
@@ -134,8 +135,7 @@
 #define   ASIC_REV_5704                         0x02
 #define   ASIC_REV_5705                         0x03
 #define   ASIC_REV_5750                         0x04
-#define   ASIC_REV_5752_A0              0x05
-#define   ASIC_REV_5752_A1              0x06
+#define   ASIC_REV_5752                         0x06
 #define  GET_CHIP_REV(CHIP_REV_ID)     ((CHIP_REV_ID) >> 8)
 #define   CHIPREV_5700_AX               0x70
 #define   CHIPREV_5700_BX               0x71