arm64: dts: rockchip: add usb2-phy otg-port support for rk3399

Add otg-port nodes for both u2phy0 and u2phy1. The otg-port can
be used for USB2.0 part of USB3.0 OTG controller.

Signed-off-by: William Wu <wulf@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index fc30b57ac55761c8acadf63a2669cefb899ca442..0ee4220ddf0818a75557b1bf13a7364d56b8165f 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1128,6 +1128,16 @@
                                interrupt-names = "linestate";
                                status = "disabled";
                        };
+
+                       u2phy0_otg: otg-port {
+                               #phy-cells = <0>;
+                               interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
+                                            <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
+                                            <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
+                               interrupt-names = "otg-bvalid", "otg-id",
+                                                 "linestate";
+                               status = "disabled";
+                       };
                };
 
                u2phy1: usb2-phy@e460 {
@@ -1145,6 +1155,16 @@
                                interrupt-names = "linestate";
                                status = "disabled";
                        };
+
+                       u2phy1_otg: otg-port {
+                               #phy-cells = <0>;
+                               interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH 0>,
+                                            <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>,
+                                            <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
+                               interrupt-names = "otg-bvalid", "otg-id",
+                                                 "linestate";
+                               status = "disabled";
+                       };
                };
 
                emmc_phy: phy@f780 {