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clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id
author
Elaine Zhang
<zhangqing@rock-chips.com>
Fri, 18 Aug 2017 03:49:25 +0000
(11:49 +0800)
committer
Heiko Stuebner
<heiko@sntech.de>
Tue, 22 Aug 2017 00:40:18 +0000
(
02:40
+0200)
In some special circumstances, may be need to reparent clk for sclk_sdio_src.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3228.c
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diff --git
a/drivers/clk/rockchip/clk-rk3228.c
b/drivers/clk/rockchip/clk-rk3228.c
index bb405d9044a3b35c5c7afc49afd8c7cffa741a53..11e7f2d1c0548166f8b762582414b3337f363a6f 100644
(file)
--- a/
drivers/clk/rockchip/clk-rk3228.c
+++ b/
drivers/clk/rockchip/clk-rk3228.c
@@
-391,7
+391,7
@@
static struct rockchip_clk_branch rk3228_clk_branches[] __initdata = {
RK2928_CLKSEL_CON(11), 8, 2, MFLAGS, 0, 8, DFLAGS,
RK2928_CLKGATE_CON(2), 11, GFLAGS),
- COMPOSITE_NODIV(
0
, "sclk_sdio_src", mux_mmc_src_p, 0,
+ COMPOSITE_NODIV(
SCLK_SDIO_SRC
, "sclk_sdio_src", mux_mmc_src_p, 0,
RK2928_CLKSEL_CON(11), 10, 2, MFLAGS,
RK2928_CLKGATE_CON(2), 13, GFLAGS),
DIV(SCLK_SDIO, "sclk_sdio", "sclk_sdio_src", 0,