#define PT_PAGE_SIZE_MASK (1ULL << 7)
#define PT_PAT_MASK (1ULL << 7)
#define PT_GLOBAL_MASK (1ULL << 8)
-#define PT64_NX_MASK (1ULL << 63)
+#define PT64_NX_SHIFT 63
+#define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
#define PT_PAT_SHIFT 7
#define PT_DIR_PAT_SHIFT 12
#define RMAP_EXT 4
+#define ACC_EXEC_MASK 1
+#define ACC_WRITE_MASK PT_WRITABLE_MASK
+#define ACC_USER_MASK PT_USER_MASK
+#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
+
struct kvm_rmap_desc {
u64 *shadow_ptes[RMAP_EXT];
struct kvm_rmap_desc *more;
>> PAGE_SHIFT;
new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
v, level - 1,
- 1, 3, &table[index]);
+ 1, ACC_ALL, &table[index]);
if (!new_table) {
pgprintk("nonpaging_map: ENOMEM\n");
kvm_release_page_clean(page);
ASSERT(!VALID_PAGE(root));
sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
- PT64_ROOT_LEVEL, 0, 0, NULL);
+ PT64_ROOT_LEVEL, 0, ACC_ALL, NULL);
root = __pa(sp->spt);
++sp->root_count;
vcpu->mmu.root_hpa = root;
root_gfn = 0;
sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
PT32_ROOT_LEVEL, !is_paging(vcpu),
- 0, NULL);
+ ACC_ALL, NULL);
root = __pa(sp->spt);
++sp->root_count;
vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
int level;
gfn_t table_gfn[PT_MAX_FULL_LEVELS];
pt_element_t pte;
- pt_element_t inherited_ar;
+ unsigned pt_access;
+ unsigned pte_access;
gfn_t gfn;
u32 error_code;
};
{
pt_element_t pte;
gfn_t table_gfn;
- unsigned index;
+ unsigned index, pt_access, pte_access;
gpa_t pte_gpa;
pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
(vcpu->cr3 & CR3_NONPAE_RESERVED_BITS) == 0);
- walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
+ pt_access = ACC_ALL;
for (;;) {
index = PT_INDEX(addr, walker->level);
pte |= PT_ACCESSED_MASK;
}
+ pte_access = pte & (PT_WRITABLE_MASK | PT_USER_MASK);
+ pte_access |= ACC_EXEC_MASK;
+#if PTTYPE == 64
+ if (is_nx(vcpu))
+ pte_access &= ~(pte >> PT64_NX_SHIFT);
+#endif
+ pte_access &= pt_access;
+
if (walker->level == PT_PAGE_TABLE_LEVEL) {
walker->gfn = gpte_to_gfn(pte);
break;
break;
}
- walker->inherited_ar &= pte;
+ pt_access = pte_access;
--walker->level;
}
}
walker->pte = pte;
- pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)pte);
+ walker->pt_access = pt_access;
+ walker->pte_access = pte_access;
+ pgprintk("%s: pte %llx pte_access %x pt_access %x\n",
+ __FUNCTION__, (u64)pte, pt_access, pte_access);
return 1;
not_present:
}
static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t gpte,
- u64 *shadow_pte, u64 access_bits,
+ u64 *shadow_pte, unsigned pt_access,
+ unsigned pte_access,
int user_fault, int write_fault,
int *ptwrite, struct guest_walker *walker,
gfn_t gfn)
int was_rmapped = is_rmap_pte(*shadow_pte);
struct page *page;
- pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
+ pgprintk("%s: spte %llx gpte %llx access %x write_fault %d"
" user_fault %d gfn %lx\n",
- __FUNCTION__, *shadow_pte, (u64)gpte, access_bits,
+ __FUNCTION__, *shadow_pte, (u64)gpte, pt_access,
write_fault, user_fault, gfn);
- access_bits &= gpte;
/*
* We don't set the accessed bit, since we sometimes want to see
* whether the guest actually used the pte (in order to detect
spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
spte |= gpte & PT64_NX_MASK;
if (!dirty)
- access_bits &= ~PT_WRITABLE_MASK;
+ pte_access &= ~ACC_WRITE_MASK;
page = gfn_to_page(vcpu->kvm, gfn);
spte |= PT_PRESENT_MASK;
- if (access_bits & PT_USER_MASK)
+ if (pte_access & ACC_USER_MASK)
spte |= PT_USER_MASK;
if (is_error_page(page)) {
spte |= page_to_phys(page);
- if ((access_bits & PT_WRITABLE_MASK)
+ if ((pte_access & ACC_WRITE_MASK)
|| (write_fault && !is_write_protection(vcpu) && !user_fault)) {
struct kvm_mmu_page *shadow;
if (shadow) {
pgprintk("%s: found shadow page for %lx, marking ro\n",
__FUNCTION__, gfn);
- access_bits &= ~PT_WRITABLE_MASK;
+ pte_access &= ~ACC_WRITE_MASK;
if (is_writeble_pte(spte)) {
spte &= ~PT_WRITABLE_MASK;
kvm_x86_ops->tlb_flush(vcpu);
unshadowed:
- if (access_bits & PT_WRITABLE_MASK)
+ if (pte_access & ACC_WRITE_MASK)
mark_page_dirty(vcpu->kvm, gfn);
pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
if (bytes < sizeof(pt_element_t))
return;
pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
- FNAME(set_pte)(vcpu, gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
- 0, NULL, NULL, gpte_to_gfn(gpte));
+ FNAME(set_pte)(vcpu, gpte, spte, ACC_ALL, ACC_ALL,
+ 0, 0, NULL, NULL, gpte_to_gfn(gpte));
}
/*
hpa_t shadow_addr;
int level;
u64 *shadow_ent;
+ unsigned access = walker->pt_access;
if (!is_present_pte(walker->pte))
return NULL;
u64 shadow_pte;
int metaphysical;
gfn_t table_gfn;
- unsigned hugepage_access = 0;
shadow_ent = ((u64 *)__va(shadow_addr)) + index;
if (is_shadow_present_pte(*shadow_ent)) {
if (level - 1 == PT_PAGE_TABLE_LEVEL
&& walker->level == PT_DIRECTORY_LEVEL) {
metaphysical = 1;
- hugepage_access = walker->pte;
- hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
if (!is_dirty_pte(walker->pte))
- hugepage_access &= ~PT_WRITABLE_MASK;
- hugepage_access >>= PT_WRITABLE_SHIFT;
- if (walker->pte & PT64_NX_MASK)
- hugepage_access |= (1 << 2);
+ access &= ~ACC_WRITE_MASK;
table_gfn = gpte_to_gfn(walker->pte);
} else {
metaphysical = 0;
table_gfn = walker->table_gfn[level - 2];
}
shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
- metaphysical, hugepage_access,
+ metaphysical, access,
shadow_ent);
shadow_addr = __pa(shadow_page->spt);
shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
}
FNAME(set_pte)(vcpu, walker->pte, shadow_ent,
- walker->inherited_ar, user_fault, write_fault,
+ access, walker->pte_access & access,
+ user_fault, write_fault,
ptwrite, walker, walker->gfn);
return shadow_ent;