/* Enables clock without considering parent dependencies or use count
* REVISIT: Maybe change this to use clk->enable like on omap1?
*/
-static int omap2_clk_enable(struct clk * clk)
+static int _omap2_clk_enable(struct clk * clk)
{
u32 regval32;
}
/* Disables clock without considering parent dependencies or use count */
-static void omap2_clk_disable(struct clk *clk)
+static void _omap2_clk_disable(struct clk *clk)
{
u32 regval32;
__raw_writel(regval32, clk->enable_reg);
}
-static int omap2_clk_use(struct clk *clk)
+static int omap2_clk_enable(struct clk *clk)
{
int ret = 0;
if (clk->usecount++ == 0) {
if (likely((u32)clk->parent))
- ret = omap2_clk_use(clk->parent);
+ ret = omap2_clk_enable(clk->parent);
if (unlikely(ret != 0)) {
clk->usecount--;
return ret;
}
- ret = omap2_clk_enable(clk);
+ ret = _omap2_clk_enable(clk);
if (unlikely(ret != 0) && clk->parent) {
- omap2_clk_unuse(clk->parent);
+ omap2_clk_disable(clk->parent);
clk->usecount--;
}
}
return ret;
}
-static void omap2_clk_unuse(struct clk *clk)
+static void omap2_clk_disable(struct clk *clk)
{
if (clk->usecount > 0 && !(--clk->usecount)) {
- omap2_clk_disable(clk);
+ _omap2_clk_disable(clk);
if (likely((u32)clk->parent))
- omap2_clk_unuse(clk->parent);
+ omap2_clk_disable(clk->parent);
}
}
reg = (void __iomem *)src_sel;
if (clk->usecount > 0)
- omap2_clk_disable(clk);
+ _omap2_clk_disable(clk);
/* Set new source value (previous dividers if any in effect) */
reg_val = __raw_readl(reg) & ~(field_mask << src_off);
__raw_writel(0x1, (void __iomem *)&PRCM_CLKCFG_CTRL);
if (clk->usecount > 0)
- omap2_clk_enable(clk);
+ _omap2_clk_enable(clk);
clk->parent = new_parent;
static struct clk_functions omap2_clk_functions = {
.clk_enable = omap2_clk_enable,
.clk_disable = omap2_clk_disable,
- .clk_use = omap2_clk_use,
- .clk_unuse = omap2_clk_unuse,
.clk_round_rate = omap2_clk_round_rate,
.clk_set_rate = omap2_clk_set_rate,
.clk_set_parent = omap2_clk_set_parent,
continue;
printk(KERN_INFO "Disabling unused clock \"%s\"\n", ck->name);
- omap2_clk_disable(ck);
+ _omap2_clk_disable(ck);
}
}
late_initcall(omap2_disable_unused_clocks);
* Only enable those clocks we will need, let the drivers
* enable other clocks as necessary
*/
- clk_use(&sync_32k_ick);
- clk_use(&omapctrl_ick);
+ clk_enable(&sync_32k_ick);
+ clk_enable(&omapctrl_ick);
if (cpu_is_omap2430())
- clk_use(&sdrc_ick);
+ clk_enable(&sdrc_ick);
return 0;
}
static void omap2_mpu_recalc(struct clk * clk);
static int omap2_select_table_rate(struct clk * clk, unsigned long rate);
static long omap2_round_to_table_rate(struct clk * clk, unsigned long rate);
-static void omap2_clk_unuse(struct clk *clk);
+static void omap2_clk_disable(struct clk *clk);
static void omap2_sys_clk_recalc(struct clk * clk);
static u32 omap2_clksel_to_divisor(u32 div_sel, u32 field_val);
static u32 omap2_clksel_get_divisor(struct clk *clk);
static struct clk usb_l4_ick = { /* FS-USB interface clock */
.name = "usb_l4_ick",
- .parent = &core_ck,
+ .parent = &core_l3_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_CKCTL | CM_CORE_SEL1 | DELAYED_APP |
CONFIG_PARTICIPANT,
.name = "gpt1_ick",
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
- .enable_reg = (void __iomem *)&CM_ICLKEN_WKUP, /* Bit4 */
+ .enable_reg = (void __iomem *)&CM_ICLKEN_WKUP, /* Bit0 */
.enable_bit = 0,
.recalc = &omap2_followparent_recalc,
};
.parent = &func_32k_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
CM_WKUP_SEL1,
- .enable_reg = (void __iomem *)&CM_FCLKEN_WKUP,
+ .enable_reg = (void __iomem *)&CM_FCLKEN_WKUP, /* Bit0 */
.enable_bit = 0,
.src_offset = 0,
.recalc = &omap2_followparent_recalc,
.name = "gpt2_ick",
.parent = &l4_ck,
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
- .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* bit4 */
+ .enable_reg = (void __iomem *)&CM_ICLKEN1_CORE, /* Bit4 */
.enable_bit = 0,
.recalc = &omap2_followparent_recalc,
};
static struct clk usbhs_ick = {
.name = "usbhs_ick",
- .parent = &l4_ck,
+ .parent = &core_l3_ck,
.flags = CLOCK_IN_OMAP243X,
.enable_reg = (void __iomem *)&CM_ICLKEN2_CORE,
.enable_bit = 6,