ARM: tegra: Add SATA controller to Tegra124 device tree
authorMikko Perttunen <mperttunen@nvidia.com>
Wed, 16 Jul 2014 08:54:17 +0000 (11:54 +0300)
committerStephen Warren <swarren@nvidia.com>
Tue, 26 Aug 2014 17:35:41 +0000 (11:35 -0600)
This adds the integrated AHCI-compliant Serial ATA controller present
in Tegra124 systems-on-chip to the Tegra124 device tree.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
[swarren, fixed node sort order]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/boot/dts/tegra124.dtsi

index 03916efd6fa98748f6d183cfda94280cf6ceeedb..727d395d7ce94f6a181edd1c2776a6d95a4d6c56 100644 (file)
                reset-names = "fuse";
        };
 
+       sata@0,70020000 {
+               compatible = "nvidia,tegra124-ahci";
+
+               reg = <0x0 0x70027000 0x0 0x2000>, /* AHCI */
+                       <0x0 0x70020000 0x0 0x7000>; /* SATA */
+
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+
+               clocks = <&tegra_car TEGRA124_CLK_SATA>,
+                       <&tegra_car TEGRA124_CLK_SATA_OOB>,
+                       <&tegra_car TEGRA124_CLK_CML1>,
+                       <&tegra_car TEGRA124_CLK_PLL_E>;
+               clock-names = "sata", "sata-oob", "cml1", "pll_e";
+
+               resets = <&tegra_car 124>,
+                       <&tegra_car 123>,
+                       <&tegra_car 129>;
+               reset-names = "sata", "sata-oob", "sata-cold";
+
+               phys = <&padctl TEGRA_XUSB_PADCTL_SATA>;
+               phy-names = "sata-phy";
+
+               status = "disabled";
+       };
+
        hda@0,70030000 {
                compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
                reg = <0x0 0x70030000 0x0 0x10000>;