regulator: pwm: Try to avoid voltage error in duty cycle calculation

In continuous mode of the PWM regulators, the requested voltage
PWM duty cycle is calculated in terms of 100% scale where entire
range denotes 100%. The calculation for PWM pulse ON time(duty_pulse)
is done as:

	duty_cycle = ((requested - minimum) * 100) / voltage_range.

then duty pulse is calculated as
	duty_pulse = (pwm_period/100) * duty_cycle

This leads to the calculation error if we have the requested voltage
where accurate pulse time is possible.
For example: Consider following case
	voltage range is 800000uV to 1350000uV.
	pwm-period = 1550ns (1ns time is 1mV).

	Requested 900000uV.

	duty_cycle = ((900000uV - 800000uV) * 100)/ 1550000
		   = 6.45 but we will get 6.

	duty_pulse = (1550/100) * 6 = 90 pulse time.

90 pulse time is equivalent to 90mV and this gives us pulse time equivalent
to 890000uV instead of 900000uV.

Proposing the solution in which if requested voltage makes the accurate
duty pulse then there will not be any error. On this case, if
(req_uV - min_uV) * pwm_period is perfect dividable by voltage_range
then get the duty pulse time directly.

	duty_pulse = ((900000uV - 800000uV) * 1550)/1550000)
		   = 100

and this is equivalent to 100mV and so final voltage is
(800000 + 100000) = 900000uV which is same as requested,

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/regulator/pwm-regulator.c b/drivers/regulator/pwm-regulator.c
index f99a6970be29f83ae6ee13f22b91ee3ff16e4b0e..8e928f23279b6ddfef96c288b01b364e51d77b12 100644 (file)
--- a/drivers/regulator/pwm-regulator.c
+++ b/drivers/regulator/pwm-regulator.c
@@ -113,18 +113,6 @@ static int pwm_regulator_is_enabled(struct regulator_dev *dev)
        return pwm_is_enabled(drvdata->pwm);
 }
 
-/**
- * Continuous voltage call-backs
- */
-static int pwm_voltage_to_duty_cycle_percentage(struct regulator_dev *rdev, int req_uV)
-{
-       int min_uV = rdev->constraints->min_uV;
-       int max_uV = rdev->constraints->max_uV;
-       int diff = max_uV - min_uV;
-
-       return ((req_uV * 100) - (min_uV * 100)) / diff;
-}
-
 static int pwm_regulator_get_voltage(struct regulator_dev *rdev)
 {
        struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev);
@@ -139,12 +127,32 @@ static int pwm_regulator_set_voltage(struct regulator_dev *rdev,
        struct pwm_regulator_data *drvdata = rdev_get_drvdata(rdev);
        unsigned int ramp_delay = rdev->constraints->ramp_delay;
        unsigned int period = pwm_get_period(drvdata->pwm);
-       int duty_cycle;
+       unsigned int req_diff = min_uV - rdev->constraints->min_uV;
+       unsigned int diff;
+       unsigned int duty_pulse;
+       u64 req_period;
+       u32 rem;
        int ret;
 
-       duty_cycle = pwm_voltage_to_duty_cycle_percentage(rdev, min_uV);
+       diff = rdev->constraints->max_uV - rdev->constraints->min_uV;
+
+       /* First try to find out if we get the iduty cycle time which is
+        * factor of PWM period time. If (request_diff_to_min * pwm_period)
+        * is perfect divided by voltage_range_diff then it is possible to
+        * get duty cycle time which is factor of PWM period. This will help
+        * to get output voltage nearer to requested value as there is no
+        * calculation loss.
+        */
+       req_period = req_diff * period;
+       div_u64_rem(req_period, diff, &rem);
+       if (!rem) {
+               do_div(req_period, diff);
+               duty_pulse = (unsigned int)req_period;
+       } else {
+               duty_pulse = (period / 100) * ((req_diff * 100) / diff);
+       }
 
-       ret = pwm_config(drvdata->pwm, (period / 100) * duty_cycle, period);
+       ret = pwm_config(drvdata->pwm, duty_pulse, period);
        if (ret) {
                dev_err(&rdev->dev, "Failed to configure PWM: %d\n", ret);
                return ret;