#define ARCH_TIMER_CTRL_IT_STAT (1 << 2)
#define ARCH_TIMER_REG_CTRL 0
-#define ARCH_TIMER_REG_FREQ 1
-#define ARCH_TIMER_REG_TVAL 2
+#define ARCH_TIMER_REG_TVAL 1
#define ARCH_TIMER_PHYS_ACCESS 0
#define ARCH_TIMER_VIRT_ACCESS 1
case ARCH_TIMER_REG_TVAL:
asm volatile("mrc p15, 0, %0, c14, c2, 0" : "=r" (val));
break;
- case ARCH_TIMER_REG_FREQ:
- asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val));
- break;
}
}
return val;
}
+static inline u32 arch_timer_get_cntfrq(void)
+{
+ u32 val;
+ asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (val));
+ return val;
+}
+
static inline u64 arch_counter_get_cntpct(void)
{
u64 cval;
u32 freq;
if (arch_timer_rate == 0) {
- freq = arch_timer_reg_read(ARCH_TIMER_PHYS_ACCESS,
- ARCH_TIMER_REG_FREQ);
+ freq = arch_timer_get_cntfrq();
/* Check the timer frequency. */
if (freq == 0) {