drivers/gpu/drm: Update WARN uses
authorJoe Perches <joe@perches.com>
Sat, 30 Oct 2010 21:08:30 +0000 (21:08 +0000)
committerDave Airlie <airlied@redhat.com>
Tue, 9 Nov 2010 03:37:15 +0000 (13:37 +1000)
Coalesce long formats.
Align arguments.
Add missing newlines.

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/drm_crtc_helper.c
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/radeon_fence.c
drivers/gpu/drm/radeon/radeon_ttm.c
drivers/gpu/drm/radeon/rs400.c
drivers/gpu/drm/radeon/rs600.c

index dcbeb98f195a7addf665e0134af9ee799280a279..f7af91cb273d58232d41c68b712b2d6d4404671c 100644 (file)
@@ -276,7 +276,7 @@ static bool drm_encoder_crtc_ok(struct drm_encoder *encoder,
        struct drm_crtc *tmp;
        int crtc_mask = 1;
 
-       WARN(!crtc, "checking null crtc?");
+       WARN(!crtc, "checking null crtc?\n");
 
        dev = crtc->dev;
 
index eba9b1615228ed124024582a7be81a498d8359cc..ef188e391406a1b3a2763e92d578c8f9e03b28b3 100644 (file)
@@ -4065,8 +4065,7 @@ i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment)
                        alignment = i915_gem_get_gtt_alignment(obj);
                if (obj_priv->gtt_offset & (alignment - 1)) {
                        WARN(obj_priv->pin_count,
-                            "bo is already pinned with incorrect alignment:"
-                            " offset=%x, req.alignment=%x\n",
+                            "bo is already pinned with incorrect alignment: offset=%x, req.alignment=%x\n",
                             obj_priv->gtt_offset, alignment);
                        ret = i915_gem_object_unbind(obj);
                        if (ret)
index 9947fd51b6e2d1041a9ef7dbc4781b81f31a887d..488c36c8f5e6069ebbb6cf5f9b830747a61c062e 100644 (file)
@@ -2033,7 +2033,7 @@ int evergreen_irq_set(struct radeon_device *rdev)
        u32 grbm_int_cntl = 0;
 
        if (!rdev->irq.installed) {
-               WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+               WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
                return -EINVAL;
        }
        /* don't enable anything if the ih is disabled */
index 0e8f28a689271c88a88d3865ead4890089049dca..8e10aa9f74b052a25e86d04e65173c8a7a19eb76 100644 (file)
@@ -442,7 +442,7 @@ int r100_pci_gart_init(struct radeon_device *rdev)
        int r;
 
        if (rdev->gart.table.ram.ptr) {
-               WARN(1, "R100 PCI GART already initialized.\n");
+               WARN(1, "R100 PCI GART already initialized\n");
                return 0;
        }
        /* Initialize common gart structure */
@@ -516,7 +516,7 @@ int r100_irq_set(struct radeon_device *rdev)
        uint32_t tmp = 0;
 
        if (!rdev->irq.installed) {
-               WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+               WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
                WREG32(R_000040_GEN_INT_CNTL, 0);
                return -EINVAL;
        }
index 34527e600fe94f91ab33da78285b695afbb6cd6e..cde1d3480d932c55ae33855c3a2336eadfe9ab54 100644 (file)
@@ -91,7 +91,7 @@ int rv370_pcie_gart_init(struct radeon_device *rdev)
        int r;
 
        if (rdev->gart.table.vram.robj) {
-               WARN(1, "RV370 PCIE GART already initialized.\n");
+               WARN(1, "RV370 PCIE GART already initialized\n");
                return 0;
        }
        /* Initialize common gart structure */
index 33952a12f0a31a49986a248a39c38cb48cdf618c..403e0df52a9de2667ecb3b37c5fb78f83bfc2a51 100644 (file)
@@ -919,7 +919,7 @@ int r600_pcie_gart_init(struct radeon_device *rdev)
        int r;
 
        if (rdev->gart.table.vram.robj) {
-               WARN(1, "R600 PCIE GART already initialized.\n");
+               WARN(1, "R600 PCIE GART already initialized\n");
                return 0;
        }
        /* Initialize common gart structure */
@@ -2995,7 +2995,7 @@ int r600_irq_set(struct radeon_device *rdev)
        u32 hdmi1, hdmi2;
 
        if (!rdev->irq.installed) {
-               WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+               WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
                return -EINVAL;
        }
        /* don't enable anything if the ih is disabled */
index 216392d0353bcace87cd2a80d06dda358e285ee4..daacb281dfafea57f26ac258dfbdca3c6d0c0767 100644 (file)
@@ -240,7 +240,8 @@ retry:
                 */
                if (seq == rdev->fence_drv.last_seq && radeon_gpu_is_lockup(rdev)) {
                        /* good news we believe it's a lockup */
-                       WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n", fence->seq, seq);
+                       WARN(1, "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
+                            fence->seq, seq);
                        /* FIXME: what should we do ? marking everyone
                         * as signaled for now
                         */
index fe95bb35317ea26c2cabe33fc0bae285bfc32cef..01c2c736a1daff116284db0f84f3896977e6eecb 100644 (file)
@@ -689,7 +689,8 @@ static int radeon_ttm_backend_bind(struct ttm_backend *backend,
        gtt = container_of(backend, struct radeon_ttm_backend, backend);
        gtt->offset = bo_mem->start << PAGE_SHIFT;
        if (!gtt->num_pages) {
-               WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
+               WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
+                    gtt->num_pages, bo_mem, backend);
        }
        r = radeon_gart_bind(gtt->rdev, gtt->offset,
                             gtt->num_pages, gtt->pages);
index f683e51a2a0674518b476d6a2157b39a303170a6..5512e4e5e636ebb91ea73e99d63a4e60bb95bbe6 100644 (file)
@@ -78,7 +78,7 @@ int rs400_gart_init(struct radeon_device *rdev)
        int r;
 
        if (rdev->gart.table.ram.ptr) {
-               WARN(1, "RS400 GART already initialized.\n");
+               WARN(1, "RS400 GART already initialized\n");
                return 0;
        }
        /* Check gart size */
index b091a1f6fa4ed2b86dc1975717abbf017667c251..f1c6e02c2e6b41f18338688b1dc9d49b33dbe8bb 100644 (file)
@@ -375,7 +375,7 @@ int rs600_gart_init(struct radeon_device *rdev)
        int r;
 
        if (rdev->gart.table.vram.robj) {
-               WARN(1, "RS600 GART already initialized.\n");
+               WARN(1, "RS600 GART already initialized\n");
                return 0;
        }
        /* Initialize common gart structure */
@@ -505,7 +505,7 @@ int rs600_irq_set(struct radeon_device *rdev)
                ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
 
        if (!rdev->irq.installed) {
-               WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+               WARN(1, "Can't enable IRQ/MSI because no handler is installed\n");
                WREG32(R_000040_GEN_INT_CNTL, 0);
                return -EINVAL;
        }