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drm/i915/cnl: Fix the CURSOR_COEFF_MASK used in DDI Vswing Programming
authorNavare, Manasi D <manasi.d.navare@intel.com>
Fri, 30 Jun 2017 01:14:01 +0000 (18:14 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Fri, 30 Jun 2017 14:17:39 +0000 (07:17 -0700)
The Cursor Coeff is lower 6 bits in the PORT_TX_DW4 register
and hence the CURSOR_COEFF_MASK should be (0x3F << 0)

Fixes: 04416108ccea ("drm/i915/cnl: Add registers related to voltage
swing sequences.")
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1498785241-21138-1-git-send-email-manasi.d.navare@intel.com
drivers/gpu/drm/i915/i915_reg.h patch | blob | blame | history

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c8647cfa81baab5c88f5d5c592814b1086a8816c..64cc674b652ac038f14b9c8ad860601e43a51ae8 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1802,7 +1802,7 @@ enum skl_disp_power_wells {
 #define   POST_CURSOR_2(x)             ((x) << 6)
 #define   POST_CURSOR_2_MASK           (0x3F << 6)
 #define   CURSOR_COEFF(x)              ((x) << 0)
-#define   CURSOR_COEFF_MASK            (0x3F << 6)
+#define   CURSOR_COEFF_MASK            (0x3F << 0)
 
 #define _CNL_PORT_TX_DW5_GRP_AE                0x162354
 #define _CNL_PORT_TX_DW5_GRP_B         0x1623D4