mmc: dw_mmc: clear IDSTS register when initialize IDMAC
authorJoonyoung Shim <jy0922.shim@samsung.com>
Fri, 26 Apr 2013 06:35:22 +0000 (15:35 +0900)
committerChris Ball <cjb@laptop.org>
Sun, 26 May 2013 18:23:19 +0000 (14:23 -0400)
If pending interrupt for IDMAC exists when initialize IDMAC, it will
call interrupt handler unnecessarily.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Seungwon Jeon <tgih.jun@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
drivers/mmc/host/dw_mmc.c

index 0652690f2d663bc397e03caaeae6f59f8fb3f959..b10e5e12b2ae7e924b80087f5a9ddc890995c1a3 100644 (file)
 #define DW_MCI_DMA_THRESHOLD   16
 
 #ifdef CONFIG_MMC_DW_IDMAC
+#define IDMAC_INT_CLR          (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
+                                SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \
+                                SDMMC_IDMAC_INT_FBE | SDMMC_IDMAC_INT_RI | \
+                                SDMMC_IDMAC_INT_TI)
+
 struct idmac_desc {
        u32             des0;   /* Control Descriptor */
 #define IDMAC_DES0_DIC BIT(1)
@@ -433,6 +438,7 @@ static int dw_mci_idmac_init(struct dw_mci *host)
        mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET);
 
        /* Mask out interrupts - get Tx & Rx complete only */
+       mci_writel(host, IDSTS, IDMAC_INT_CLR);
        mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI |
                   SDMMC_IDMAC_INT_TI);