drm/i915: Correct the bit number for the MI_FLUSH_ENABLE.

Older specs claimed this was bit 11, but newer specs and the actual
simulator code say it was bit 12.  Regardless, we don't use MI_FLUSH,
or try to enable it any more.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
[danvet: Anyone trying to use this bit, please read all the relevant
discussions, it's epic.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c3afb783cb9d93bf7c79dd32a18d8627ed6bfd0d..bbad78853482ec718617dba8921b6791b1c62493 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -391,7 +391,7 @@
 
 #define MI_MODE                0x0209c
 # define VS_TIMER_DISPATCH                             (1 << 6)
-# define MI_FLUSH_ENABLE                               (1 << 11)
+# define MI_FLUSH_ENABLE                               (1 << 12)
 
 #define GFX_MODE       0x02520
 #define GFX_MODE_GEN7  0x0229c