arm64: dts: exynos: Add TMU node for exynos7

This patch adds TMU node, related temprature sensor and triping
point data for Atlas cpu core found on exynos7 SoC.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>

diff --git a/arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi b/arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi
new file mode 100644 (file)
index 0000000..1d6dcf2
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-tmu-sensor-conf.dtsi
@@ -0,0 +1,25 @@
+/*
+ * Device tree sources for Exynos7 TMU sensor configuration
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <dt-bindings/thermal/thermal_exynos.h>
+
+#thermal-sensor-cells = <0>;
+samsung,tmu_gain = <9>;
+samsung,tmu_reference_voltage = <17>;
+samsung,tmu_noise_cancel_mode = <4>;
+samsung,tmu_efuse_value = <75>;
+samsung,tmu_min_efuse_value = <15>;
+samsung,tmu_max_efuse_value = <100>;
+samsung,tmu_first_point_trim = <25>;
+samsung,tmu_second_point_trim = <85>;
+samsung,tmu_default_temp_offset = <50>;
+samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;

diff --git a/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi
new file mode 100644 (file)
index 0000000..0623583
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynos7-trip-points.dtsi
@@ -0,0 +1,54 @@
+/*
+ * Device tree sources for default Exynos7 thermal zone definition
+ *
+ * Copyright (c) 2016 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+trips {
+       cpu-alert-0 {
+               temperature = <75000>; /* millicelsius */
+               hysteresis = <10000>; /* millicelsius */
+               type = "passive";
+       };
+       cpu-alert-1 {
+               temperature = <80000>; /* millicelsius */
+               hysteresis = <10000>; /* millicelsius */
+               type = "passive";
+       };
+       cpu-alert-2 {
+               temperature = <85000>; /* millicelsius */
+               hysteresis = <10000>; /* millicelsius */
+               type = "passive";
+       };
+       cpu-alert-3 {
+               temperature = <90000>; /* millicelsius */
+               hysteresis = <10000>; /* millicelsius */
+               type = "passive";
+       };
+       cpu-alert-4 {
+               temperature = <95000>; /* millicelsius */
+               hysteresis = <10000>; /* millicelsius */
+               type = "passive";
+       };
+       cpu-alert-5 {
+               temperature = <100000>; /* millicelsius */
+               hysteresis = <10000>; /* millicelsius */
+               type = "passive";
+       };
+       cpu-alert-6 {
+               temperature = <110000>; /* millicelsius */
+               hysteresis = <10000>; /* millicelsius */
+               type = "passive";
+       };
+       cpu-crit-0 {
+               temperature = <115000>; /* millicelsius */
+               hysteresis = <0>; /* millicelsius */
+               type = "critical";
+       };
+};

diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 93108f1a90f9c5ec6e37cb7fd23849da8ad11d20..2450d0a06da5c47ee9d67ed2faa7bea6d3304fec 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -27,6 +27,7 @@
                pinctrl6 = &pinctrl_fsys0;
                pinctrl7 = &pinctrl_fsys1;
                pinctrl8 = &pinctrl_bus1;
+               tmuctrl0 = &tmuctrl_0;
        };
 
        cpus {
@@ -538,6 +539,25 @@
                        clocks = <&clock_peric0 PCLK_PWM>;
                        clock-names = "timers";
                };
+
+               tmuctrl_0: tmu@10060000 {
+                       compatible = "samsung,exynos7-tmu";
+                       reg = <0x10060000 0x200>;
+                       interrupts = <0 108 0>;
+                       clocks = <&clock_peris PCLK_TMU>,
+                                <&clock_peris SCLK_TMU>;
+                       clock-names = "tmu_apbif", "tmu_sclk";
+                       #include "exynos7-tmu-sensor-conf.dtsi"
+               };
+
+               thermal-zones {
+                       atlas_thermal: cluster0-thermal {
+                               polling-delay-passive = <0>; /* milliseconds */
+                               polling-delay = <0>; /* milliseconds */
+                               thermal-sensors = <&tmuctrl_0>;
+                               #include "exynos7-trip-points.dtsi"
+                       };
+               };
        };
 };