The A31 SoC uses the same SPDIF block as found in earlier SoCs, but its
reset is controlled via a separate reset controller.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
- compatible : should be one of the following:
- "allwinner,sun4i-a10-spdif": for the Allwinner A10 SoC
+ - "allwinner,sun6i-a31-spdif": for the Allwinner A31 SoC
- reg : Offset and length of the register set for the device.
"apb" clock for the spdif bus.
"spdif" clock for spdif controller.
+ - resets : reset specifier for the ahb reset (A31 and newer only)
+
Example:
spdif: spdif@01c21000 {