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MIPS: hugetlbfs: Fix hazard between tlb write and pagemask restoration.
author
Ralf Baechle
<ralf@linux-mips.org>
Tue, 16 Oct 2012 23:01:21 +0000
(
01:01
+0200)
committer
Ralf Baechle
<ralf@linux-mips.org>
Tue, 16 Oct 2012 23:01:21 +0000
(
01:01
+0200)
On some CPU the write to pagemask might complete before the TLB write
instruction reads from the pagemask register.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/tlb-r4k.c
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diff --git
a/arch/mips/mm/tlb-r4k.c
b/arch/mips/mm/tlb-r4k.c
index 87b9cfcc30ff9ee44a982ae40982073e3eb5b855..4b9b935a070e0c4d0160f2c259c3dc553c40b35e 100644
(file)
--- a/
arch/mips/mm/tlb-r4k.c
+++ b/
arch/mips/mm/tlb-r4k.c
@@
-320,6
+320,7
@@
void __update_tlb(struct vm_area_struct * vma, unsigned long address, pte_t pte)
tlb_write_random();
else
tlb_write_indexed();
+ tlbw_use_hazard();
write_c0_pagemask(PM_DEFAULT_MASK);
} else
#endif