drm/omap: omap_display_timings: rename y_res to vactive
authorPeter Ujfalusi <peter.ujfalusi@ti.com>
Thu, 22 Sep 2016 11:06:47 +0000 (14:06 +0300)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 2 Nov 2016 08:48:18 +0000 (10:48 +0200)
In preparation to move the stack to use the generic videmode struct for
display timing information rename the y_res member to vactive.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
21 files changed:
drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
drivers/gpu/drm/omapdrm/displays/connector-dvi.c
drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
drivers/gpu/drm/omapdrm/dss/dispc.c
drivers/gpu/drm/omapdrm/dss/display.c
drivers/gpu/drm/omapdrm/dss/dsi.c
drivers/gpu/drm/omapdrm/dss/hdmi4.c
drivers/gpu/drm/omapdrm/dss/hdmi5.c
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
drivers/gpu/drm/omapdrm/dss/omapdss.h
drivers/gpu/drm/omapdrm/dss/rfbi.c
drivers/gpu/drm/omapdrm/dss/venc.c
drivers/gpu/drm/omapdrm/omap_connector.c

index 190a03672181270b44271da07b4427e4ac6683b3..a57e1efb12ac1d7a4f2c3f627f90f5e224008b5f 100644 (file)
@@ -31,7 +31,7 @@ struct panel_drv_data {
 
 static const struct omap_video_timings tvc_pal_timings = {
        .hactive        = 720,
-       .y_res          = 574,
+       .vactive        = 574,
        .pixelclock     = 13500000,
        .hsw            = 64,
        .hfp            = 12,
index c6e02e1a3799414722ed5e03837cee138724e674..b25c05c27c80a917839f55de3239e13dcf01d56f 100644 (file)
@@ -21,7 +21,7 @@
 
 static const struct omap_video_timings dvic_default_timings = {
        .hactive        = 640,
-       .y_res          = 480,
+       .vactive        = 480,
 
        .pixelclock     = 23500000,
 
index ef5ae08b362bd58074ce23126367246db3fdf792..33bc41c5cf714e29cbea93105d83cb77c64004cd 100644 (file)
@@ -23,7 +23,7 @@
 
 static const struct omap_video_timings hdmic_default_timings = {
        .hactive        = 640,
-       .y_res          = 480,
+       .vactive        = 480,
        .pixelclock     = 25175000,
        .hsw            = 96,
        .hfp            = 16,
index c34f2aa0118b59f999468c3db8d7a7de5836f64b..c3d2a12358fa1afb4c97e7fe025aa5ebb81a6548 100644 (file)
@@ -383,7 +383,7 @@ static void dsicm_get_resolution(struct omap_dss_device *dssdev,
                u16 *xres, u16 *yres)
 {
        *xres = dssdev->panel.timings.hactive;
-       *yres = dssdev->panel.timings.y_res;
+       *yres = dssdev->panel.timings.vactive;
 }
 
 static ssize_t dsicm_num_errors_show(struct device *dev,
@@ -893,7 +893,7 @@ static int dsicm_update(struct omap_dss_device *dssdev,
        /* XXX no need to send this every frame, but dsi break if not done */
        r = dsicm_set_update_window(ddata, 0, 0,
                        dssdev->panel.timings.hactive,
-                       dssdev->panel.timings.y_res);
+                       dssdev->panel.timings.vactive);
        if (r)
                goto err;
 
@@ -1025,7 +1025,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev,
 
        size = min(w * h * 3,
                        dssdev->panel.timings.hactive *
-                       dssdev->panel.timings.y_res * 3);
+                       dssdev->panel.timings.vactive * 3);
 
        in->ops.dsi->bus_lock(in);
 
@@ -1187,7 +1187,7 @@ static int dsicm_probe(struct platform_device *pdev)
                return r;
 
        ddata->timings.hactive = 864;
-       ddata->timings.y_res = 480;
+       ddata->timings.vactive = 480;
        ddata->timings.pixelclock = 864 * 480 * 60;
 
        dssdev = &ddata->dssdev;
index c8b5462f462f3f744855e90a06faaee95caf0cf0..dc8d191e3635c15d28f85c97c682930cc34b12e7 100644 (file)
@@ -21,7 +21,7 @@
 
 static struct omap_video_timings lb035q02_timings = {
        .hactive = 320,
-       .y_res = 240,
+       .vactive = 240,
 
        .pixelclock     = 6500000,
 
index f0895c7b6d5cd7e97b1b499b00ec4b13a1fec9e9..83658b9077fc4da893496f3ba1a3ac1e13a8ca17 100644 (file)
@@ -67,7 +67,7 @@ static const struct {
 
 static const struct omap_video_timings nec_8048_panel_timings = {
        .hactive        = LCD_XRES,
-       .y_res          = LCD_YRES,
+       .vactive        = LCD_YRES,
        .pixelclock     = LCD_PIXEL_CLOCK,
        .hfp            = 6,
        .hsw            = 1,
index b66ad743c60734a6f88388c3e3496f0b5e49ed49..c2dda73ac46673e1ae69922f9f52962c77b0ea69 100644 (file)
@@ -37,7 +37,7 @@ struct panel_drv_data {
 
 static const struct omap_video_timings sharp_ls_timings = {
        .hactive = 480,
-       .y_res = 640,
+       .vactive = 640,
 
        .pixelclock     = 19200000,
 
index 2764bc94a20579c521331bebe6548615493f2711..a7a6d5239f311111121f790e628107da886ff1b3 100644 (file)
@@ -94,7 +94,7 @@ struct panel_drv_data {
 
 static const struct omap_video_timings acx565akm_panel_timings = {
        .hactive        = 800,
-       .y_res          = 480,
+       .vactive        = 480,
        .pixelclock     = 24000000,
        .hfp            = 28,
        .hsw            = 4,
index 935728405cde6f994a5c9e0fff2da0274e11d873..013286abbfda6b3f1f94b8e3712530bb8bd19d0f 100644 (file)
@@ -44,7 +44,7 @@ struct panel_drv_data {
 
 static struct omap_video_timings td028ttec1_panel_timings = {
        .hactive        = 480,
-       .y_res          = 640,
+       .vactive        = 640,
        .pixelclock     = 22153000,
        .hfp            = 24,
        .hsw            = 8,
index fe8166640da8858b89e588c25e38f8de7a52a546..eedbea62c51d269ee0ae35d866fa89551674888d 100644 (file)
@@ -74,7 +74,7 @@ struct panel_drv_data {
 
 static const struct omap_video_timings tpo_td043_timings = {
        .hactive        = 800,
-       .y_res          = 480,
+       .vactive        = 480,
 
        .pixelclock     = 36000000,
 
index b34ac915a761e415574851342fc5cbe72da51e6d..3d208ce67794e0a59d81bb99fae5ad4e83c098a5 100644 (file)
@@ -2820,7 +2820,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
        const bool replication = false;
        bool truncation;
        int in_width = mgr_timings->hactive;
-       int in_height = mgr_timings->y_res;
+       int in_height = mgr_timings->vactive;
        enum omap_overlay_caps caps =
                OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA;
 
@@ -3118,7 +3118,7 @@ static bool _dispc_mgr_pclk_ok(enum omap_channel channel,
 bool dispc_mgr_timings_ok(enum omap_channel channel,
                const struct omap_video_timings *timings)
 {
-       if (!_dispc_mgr_size_ok(timings->hactive, timings->y_res))
+       if (!_dispc_mgr_size_ok(timings->hactive, timings->vactive))
                return false;
 
        if (!_dispc_mgr_pclk_ok(channel, timings->pixelclock))
@@ -3259,7 +3259,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
        unsigned long ht, vt;
        struct omap_video_timings t = *timings;
 
-       DSSDBG("channel %d xres %u yres %u\n", channel, t.hactive, t.y_res);
+       DSSDBG("channel %d xres %u yres %u\n", channel, t.hactive, t.vactive);
 
        if (!dispc_mgr_timings_ok(channel, &t)) {
                BUG();
@@ -3272,7 +3272,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
                                t.data_pclk_edge, t.de_level, t.sync_pclk_edge);
 
                xtot = t.hactive + t.hfp + t.hsw + t.hbp;
-               ytot = t.y_res + t.vfp + t.vsw + t.vbp;
+               ytot = t.vactive + t.vfp + t.vsw + t.vbp;
 
                ht = timings->pixelclock / xtot;
                vt = timings->pixelclock / xtot / ytot;
@@ -3287,14 +3287,14 @@ void dispc_mgr_set_timings(enum omap_channel channel,
                DSSDBG("hsync %luHz, vsync %luHz\n", ht, vt);
        } else {
                if (t.interlace)
-                       t.y_res /= 2;
+                       t.vactive /= 2;
 
                if (dispc.feat->supports_double_pixel)
                        REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0,
                                19, 17);
        }
 
-       dispc_mgr_set_size(channel, t.hactive, t.y_res);
+       dispc_mgr_set_size(channel, t.hactive, t.vactive);
 }
 EXPORT_SYMBOL(dispc_mgr_set_timings);
 
@@ -4220,7 +4220,7 @@ static const struct dispc_errata_i734_data {
        struct dss_lcd_mgr_config lcd_conf;
 } i734 = {
        .timings = {
-               .hactive = 8, .y_res = 1,
+               .hactive = 8, .vactive = 1,
                .pixelclock = 16000000,
                .hsw = 8, .hfp = 4, .hbp = 4,
                .vsw = 1, .vfp = 1, .vbp = 1,
index 4808cc8368c507616f87856a53202e3bb21aec56..29ae5d6e1508b8387c8107e023b43c2b6691f605 100644 (file)
@@ -36,7 +36,7 @@ void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
                        u16 *xres, u16 *yres)
 {
        *xres = dssdev->panel.timings.hactive;
-       *yres = dssdev->panel.timings.y_res;
+       *yres = dssdev->panel.timings.vactive;
 }
 EXPORT_SYMBOL(omapdss_default_get_resolution);
 
@@ -228,7 +228,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
        ovt->hbp = vm->hback_porch;
        ovt->hfp = vm->hfront_porch;
        ovt->hsw = vm->hsync_len;
-       ovt->y_res = vm->vactive;
+       ovt->vactive = vm->vactive;
        ovt->vbp = vm->vback_porch;
        ovt->vfp = vm->vfront_porch;
        ovt->vsw = vm->vsync_len;
@@ -261,7 +261,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
        vm->hback_porch = ovt->hbp;
        vm->hfront_porch = ovt->hfp;
        vm->hsync_len = ovt->hsw;
-       vm->vactive = ovt->y_res;
+       vm->vactive = ovt->vactive;
        vm->vback_porch = ovt->vbp;
        vm->vfront_porch = ovt->vfp;
        vm->vsync_len = ovt->vsw;
index 2bd4d0cdd2f29787d426d598c9d6fd9fccc5562c..06b15091d62ff38dbf97dd9d478bf14dd2054a8d 100644 (file)
@@ -3722,7 +3722,7 @@ static void dsi_proto_timings(struct platform_device *dsidev)
                DSSDBG("HBP: %d, HFP: %d, HSA: %d, TL: %d TXBYTECLKHS\n", hbp,
                        hfp, hsync_end ? hsa : 0, tl);
                DSSDBG("VBP: %d, VFP: %d, VSA: %d, VACT: %d lines\n", vbp, vfp,
-                       vsa, timings->y_res);
+                       vsa, timings->vactive);
 
                r = dsi_read_reg(dsidev, DSI_VM_TIMING1);
                r = FLD_MOD(r, hbp, 11, 0);     /* HBP */
@@ -3738,7 +3738,7 @@ static void dsi_proto_timings(struct platform_device *dsidev)
                dsi_write_reg(dsidev, DSI_VM_TIMING2, r);
 
                r = dsi_read_reg(dsidev, DSI_VM_TIMING3);
-               r = FLD_MOD(r, timings->y_res, 14, 0);  /* VACT */
+               r = FLD_MOD(r, timings->vactive, 14, 0);        /* VACT */
                r = FLD_MOD(r, tl, 31, 16);             /* TL */
                dsi_write_reg(dsidev, DSI_VM_TIMING3, r);
        }
@@ -3919,7 +3919,7 @@ static void dsi_update_screen_dispc(struct platform_device *dsidev)
        const unsigned channel = dsi->update_channel;
        const unsigned line_buf_size = dsi->line_buffer_size;
        u16 w = dsi->timings.hactive;
-       u16 h = dsi->timings.y_res;
+       u16 h = dsi->timings.vactive;
 
        DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h);
 
@@ -4057,7 +4057,7 @@ static int dsi_update(struct omap_dss_device *dssdev, int channel,
        dsi->framedone_data = data;
 
        dw = dsi->timings.hactive;
-       dh = dsi->timings.y_res;
+       dh = dsi->timings.vactive;
 
 #ifdef DSI_PERF_MEASURE
        dsi->update_bytes = dw * dh *
@@ -4422,7 +4422,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
        *t = *ctx->config->timings;
        t->pixelclock = pck;
        t->hactive = ctx->config->timings->hactive;
-       t->y_res = ctx->config->timings->y_res;
+       t->vactive = ctx->config->timings->vactive;
        t->hsw = t->hfp = t->hbp = t->vsw = 1;
        t->vfp = t->vbp = 0;
 
@@ -4635,7 +4635,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
 
        dsi_vm->vsa = req_vm->vsw;
        dsi_vm->vbp = req_vm->vbp;
-       dsi_vm->vact = req_vm->y_res;
+       dsi_vm->vact = req_vm->vactive;
        dsi_vm->vfp = req_vm->vfp;
 
        dsi_vm->trans_mode = cfg->trans_mode;
index c5e89c8876875c6b30f1f853489482ffca2c8c81..2a5a71a25423e9f8b9904357da495b126bff309f 100644 (file)
@@ -171,7 +171,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 
        p = &hdmi.cfg.timings;
 
-       DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res);
+       DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", p->hactive,
+              p->vactive);
 
        pc = p->pixelclock;
        if (p->double_pixel)
index 829d22253972e02d22f36ddbff8a35be428987f5..45f445523a4f49b78ed1e3c3c8766b75ef97e5ca 100644 (file)
@@ -183,7 +183,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 
        p = &hdmi.cfg.timings;
 
-       DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res);
+       DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", p->hactive,
+              p->vactive);
 
        pc = p->pixelclock;
        if (p->double_pixel)
index cecc400b08e2760f471ae6430b95806263aee027..3f76976b0e38b79c320c85d1f54969f5753ff9d3 100644 (file)
@@ -308,7 +308,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
                if (video_cfg->vblank % 2 != 0)
                        video_cfg->vblank_osc = 1;
 
-               video_cfg->v_fc_config.timings.y_res /= 2;
+               video_cfg->v_fc_config.timings.vactive /= 2;
                video_cfg->vblank /= 2;
                video_cfg->v_fc_config.timings.vfp /= 2;
                video_cfg->v_fc_config.timings.vsw /= 2;
@@ -354,9 +354,9 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
 
        /* set y resolution */
        REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1,
-                       cfg->v_fc_config.timings.y_res >> 8, 4, 0);
+                       cfg->v_fc_config.timings.vactive >> 8, 4, 0);
        REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV0,
-                       cfg->v_fc_config.timings.y_res & 0xFF, 7, 0);
+                       cfg->v_fc_config.timings.vactive & 0xFF, 7, 0);
 
        /* set horizontal blanking pixels */
        REG_FLD_MOD(base, HDMI_CORE_FC_INHBLANK1, cfg->hblank >> 8, 4, 0);
index 17f0d7afb855d6b4acd3c6dc9dbd3460fe5a0ef0..05462cfe5af81f6d5efecebdd8658feaed132fc3 100644 (file)
@@ -198,7 +198,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
        DSSDBG("Enter hdmi_wp_video_init_format\n");
 
        video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444;
-       video_fmt->y_res = param->timings.y_res;
+       video_fmt->y_res = param->timings.vactive;
        video_fmt->x_res = param->timings.hactive;
 
        timings->hbp = param->timings.hbp;
index ddd6d14049d0280826c80b8829e2ee31b1da2ae9..0b969f6f5701445f44e978f34bcb8505cb114fbd 100644 (file)
@@ -303,7 +303,7 @@ struct omap_video_timings {
        /* Unit: pixels */
        u16 hactive;
        /* Unit: pixels */
-       u16 y_res;
+       u16 vactive;
        /* Unit: Hz */
        u32 pixelclock;
        /* Unit: pixel clocks */
index 81d26d1562f6aa2eb6b24b9abc8fab6310cbf78c..ef9984c3d90636f88281cce7e8ebfe33ef7b59be 100644 (file)
@@ -309,7 +309,7 @@ static int rfbi_transfer_area(struct omap_dss_device *dssdev,
        int r;
        struct omap_overlay_manager *mgr = rfbi.output.manager;
        u16 width = rfbi.timings.hactive;
-       u16 height = rfbi.timings.y_res;
+       u16 height = rfbi.timings.vactive;
 
        /*BUG_ON(callback == 0);*/
        BUG_ON(rfbi.framedone_callback != NULL);
@@ -778,7 +778,7 @@ static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
 static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h)
 {
        rfbi.timings.hactive = w;
-       rfbi.timings.y_res = h;
+       rfbi.timings.vactive = h;
 }
 
 static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size)
@@ -854,7 +854,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
        dss_mgr_set_lcd_config(mgr, &mgr_config);
 
        /*
-        * Set rfbi.timings with default values, the hactive and y_res fields
+        * Set rfbi.timings with default values, the hactive and vactive fields
         * are expected to be already configured by the panel driver via
         * omapdss_rfbi_set_size()
         */
index 970c3cb97a8c7601108883fc6da34dd753422bd9..463dc4e27f7a4c6ab17d37ee0dc54150012d0032 100644 (file)
@@ -264,7 +264,7 @@ static const struct venc_config venc_config_pal_bdghi = {
 
 const struct omap_video_timings omap_dss_pal_timings = {
        .hactive        = 720,
-       .y_res          = 574,
+       .vactive        = 574,
        .pixelclock     = 13500000,
        .hsw            = 64,
        .hfp            = 12,
@@ -285,7 +285,7 @@ EXPORT_SYMBOL(omap_dss_pal_timings);
 
 const struct omap_video_timings omap_dss_ntsc_timings = {
        .hactive        = 720,
-       .y_res          = 482,
+       .vactive        = 482,
        .pixelclock     = 13500000,
        .hsw            = 64,
        .hfp            = 16,
index bc33ce34a856567542b4331e8695bc1d4093e445..e3833efb6db8bc97fe7b92c0e3069638a0a23a55 100644 (file)
@@ -52,7 +52,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
        mode->hsync_end = mode->hsync_start + timings->hsw;
        mode->htotal = mode->hsync_end + timings->hbp;
 
-       mode->vdisplay = timings->y_res;
+       mode->vdisplay = timings->vactive;
        mode->vsync_start = mode->vdisplay + timings->vfp;
        mode->vsync_end = mode->vsync_start + timings->vsw;
        mode->vtotal = mode->vsync_end + timings->vbp;
@@ -86,7 +86,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
        timings->hsw = mode->hsync_end - mode->hsync_start;
        timings->hbp = mode->htotal - mode->hsync_end;
 
-       timings->y_res = mode->vdisplay;
+       timings->vactive = mode->vdisplay;
        timings->vfp = mode->vsync_start - mode->vdisplay;
        timings->vsw = mode->vsync_end - mode->vsync_start;
        timings->vbp = mode->vtotal - mode->vsync_end;