wifi: rt2x00: set SoC wmac clock register
authorDaniel Golle <daniel@makrotopia.org>
Sat, 17 Sep 2022 20:29:55 +0000 (21:29 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 26 Oct 2022 11:17:10 +0000 (13:17 +0200)
[ Upstream commit cbde6ed406a51092d9e8a2df058f5f8490f27443 ]

Instead of using the default value 33 (pci), set US_CYC_CNT init based
on Programming guide:
If available, set chipset bus clock with fallback to cpu clock/3.

Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/3e275d259f476f597dab91a9c395015ef3fe3284.1663445157.git.daniel@makrotopia.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/wireless/ralink/rt2x00/rt2800lib.c

index 0c90bf0540b92d7148b72ad7d872730683b9aeea..57fa472b5c4e2d4cb0c8cb202648c78580c56750 100644 (file)
@@ -5567,6 +5567,27 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
                reg = rt2800_register_read(rt2x00dev, US_CYC_CNT);
                rt2x00_set_field32(&reg, US_CYC_CNT_CLOCK_CYCLE, 125);
                rt2800_register_write(rt2x00dev, US_CYC_CNT, reg);
+       } else if (rt2x00_is_soc(rt2x00dev)) {
+               struct clk *clk = clk_get_sys("bus", NULL);
+               int rate;
+
+               if (IS_ERR(clk)) {
+                       clk = clk_get_sys("cpu", NULL);
+
+                       if (IS_ERR(clk)) {
+                               rate = 125;
+                       } else {
+                               rate = clk_get_rate(clk) / 3000000;
+                               clk_put(clk);
+                       }
+               } else {
+                       rate = clk_get_rate(clk) / 1000000;
+                       clk_put(clk);
+               }
+
+               reg = rt2800_register_read(rt2x00dev, US_CYC_CNT);
+               rt2x00_set_field32(&reg, US_CYC_CNT_CLOCK_CYCLE, rate);
+               rt2800_register_write(rt2x00dev, US_CYC_CNT, reg);
        }
 
        reg = rt2800_register_read(rt2x00dev, HT_FBK_CFG0);