drm/nouveau/core: allow representing method ranges in nouveau_omthds

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv04.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv04.c
index 6185282484578658ceae6a6e5430f68ed6689f11..e30a9c5ff1fceb0a093fcbe7261956cd2cc6c0bf 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv04.c
@@ -787,168 +787,168 @@ nv01_graph_mthd_bind_chroma(struct nouveau_object *object, u32 mthd,
 
 static struct nouveau_omthds
 nv03_graph_gdi_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_patt },
-       { 0x0188, nv04_graph_mthd_bind_rop },
-       { 0x018c, nv04_graph_mthd_bind_beta1 },
-       { 0x0190, nv04_graph_mthd_bind_surf_dst },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_patt },
+       { 0x0188, 0x0188, nv04_graph_mthd_bind_rop },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_beta1 },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_surf_dst },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_gdi_omthds[] = {
-       { 0x0188, nv04_graph_mthd_bind_patt },
-       { 0x018c, nv04_graph_mthd_bind_rop },
-       { 0x0190, nv04_graph_mthd_bind_beta1 },
-       { 0x0194, nv04_graph_mthd_bind_beta4 },
-       { 0x0198, nv04_graph_mthd_bind_surf2d },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0188, 0x0188, nv04_graph_mthd_bind_patt },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_rop },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_beta1 },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta4 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_surf2d },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv01_graph_blit_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_chroma },
-       { 0x0188, nv01_graph_mthd_bind_clip },
-       { 0x018c, nv01_graph_mthd_bind_patt },
-       { 0x0190, nv04_graph_mthd_bind_rop },
-       { 0x0194, nv04_graph_mthd_bind_beta1 },
-       { 0x0198, nv04_graph_mthd_bind_surf_dst },
-       { 0x019c, nv04_graph_mthd_bind_surf_src },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_chroma },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_clip },
+       { 0x018c, 0x018c, nv01_graph_mthd_bind_patt },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_rop },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta1 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_surf_dst },
+       { 0x019c, 0x019c, nv04_graph_mthd_bind_surf_src },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_blit_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_chroma },
-       { 0x0188, nv01_graph_mthd_bind_clip },
-       { 0x018c, nv04_graph_mthd_bind_patt },
-       { 0x0190, nv04_graph_mthd_bind_rop },
-       { 0x0194, nv04_graph_mthd_bind_beta1 },
-       { 0x0198, nv04_graph_mthd_bind_beta4 },
-       { 0x019c, nv04_graph_mthd_bind_surf2d },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_chroma },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_clip },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_patt },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_rop },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta1 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_beta4 },
+       { 0x019c, 0x019c, nv04_graph_mthd_bind_surf2d },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_iifc_omthds[] = {
-       { 0x0188, nv01_graph_mthd_bind_chroma },
-       { 0x018c, nv01_graph_mthd_bind_clip },
-       { 0x0190, nv04_graph_mthd_bind_patt },
-       { 0x0194, nv04_graph_mthd_bind_rop },
-       { 0x0198, nv04_graph_mthd_bind_beta1 },
-       { 0x019c, nv04_graph_mthd_bind_beta4 },
-       { 0x01a0, nv04_graph_mthd_bind_surf2d_swzsurf },
-       { 0x03e4, nv04_graph_mthd_set_operation },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_chroma },
+       { 0x018c, 0x018c, nv01_graph_mthd_bind_clip },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_patt },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_rop },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_beta1 },
+       { 0x019c, 0x019c, nv04_graph_mthd_bind_beta4 },
+       { 0x01a0, 0x01a0, nv04_graph_mthd_bind_surf2d_swzsurf },
+       { 0x03e4, 0x03e4, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv01_graph_ifc_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_chroma },
-       { 0x0188, nv01_graph_mthd_bind_clip },
-       { 0x018c, nv01_graph_mthd_bind_patt },
-       { 0x0190, nv04_graph_mthd_bind_rop },
-       { 0x0194, nv04_graph_mthd_bind_beta1 },
-       { 0x0198, nv04_graph_mthd_bind_surf_dst },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_chroma },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_clip },
+       { 0x018c, 0x018c, nv01_graph_mthd_bind_patt },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_rop },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta1 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_surf_dst },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_ifc_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_chroma },
-       { 0x0188, nv01_graph_mthd_bind_clip },
-       { 0x018c, nv04_graph_mthd_bind_patt },
-       { 0x0190, nv04_graph_mthd_bind_rop },
-       { 0x0194, nv04_graph_mthd_bind_beta1 },
-       { 0x0198, nv04_graph_mthd_bind_beta4 },
-       { 0x019c, nv04_graph_mthd_bind_surf2d },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_chroma },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_clip },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_patt },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_rop },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta1 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_beta4 },
+       { 0x019c, 0x019c, nv04_graph_mthd_bind_surf2d },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv03_graph_sifc_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_chroma },
-       { 0x0188, nv01_graph_mthd_bind_patt },
-       { 0x018c, nv04_graph_mthd_bind_rop },
-       { 0x0190, nv04_graph_mthd_bind_beta1 },
-       { 0x0194, nv04_graph_mthd_bind_surf_dst },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_chroma },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_patt },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_rop },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_beta1 },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_surf_dst },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_sifc_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_chroma },
-       { 0x0188, nv04_graph_mthd_bind_patt },
-       { 0x018c, nv04_graph_mthd_bind_rop },
-       { 0x0190, nv04_graph_mthd_bind_beta1 },
-       { 0x0194, nv04_graph_mthd_bind_beta4 },
-       { 0x0198, nv04_graph_mthd_bind_surf2d },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_chroma },
+       { 0x0188, 0x0188, nv04_graph_mthd_bind_patt },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_rop },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_beta1 },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta4 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_surf2d },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv03_graph_sifm_omthds[] = {
-       { 0x0188, nv01_graph_mthd_bind_patt },
-       { 0x018c, nv04_graph_mthd_bind_rop },
-       { 0x0190, nv04_graph_mthd_bind_beta1 },
-       { 0x0194, nv04_graph_mthd_bind_surf_dst },
-       { 0x0304, nv04_graph_mthd_set_operation },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_patt },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_rop },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_beta1 },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_surf_dst },
+       { 0x0304, 0x0304, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_sifm_omthds[] = {
-       { 0x0188, nv04_graph_mthd_bind_patt },
-       { 0x018c, nv04_graph_mthd_bind_rop },
-       { 0x0190, nv04_graph_mthd_bind_beta1 },
-       { 0x0194, nv04_graph_mthd_bind_beta4 },
-       { 0x0198, nv04_graph_mthd_bind_surf2d },
-       { 0x0304, nv04_graph_mthd_set_operation },
+       { 0x0188, 0x0188, nv04_graph_mthd_bind_patt },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_rop },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_beta1 },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta4 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_surf2d },
+       { 0x0304, 0x0304, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_surf3d_omthds[] = {
-       { 0x02f8, nv04_graph_mthd_surf3d_clip_h },
-       { 0x02fc, nv04_graph_mthd_surf3d_clip_v },
+       { 0x02f8, 0x02f8, nv04_graph_mthd_surf3d_clip_h },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_surf3d_clip_v },
        {}
 };
 
 static struct nouveau_omthds
 nv03_graph_ttri_omthds[] = {
-       { 0x0188, nv01_graph_mthd_bind_clip },
-       { 0x018c, nv04_graph_mthd_bind_surf_color },
-       { 0x0190, nv04_graph_mthd_bind_surf_zeta },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_clip },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_surf_color },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_surf_zeta },
        {}
 };
 
 static struct nouveau_omthds
 nv01_graph_prim_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_clip },
-       { 0x0188, nv01_graph_mthd_bind_patt },
-       { 0x018c, nv04_graph_mthd_bind_rop },
-       { 0x0190, nv04_graph_mthd_bind_beta1 },
-       { 0x0194, nv04_graph_mthd_bind_surf_dst },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_clip },
+       { 0x0188, 0x0188, nv01_graph_mthd_bind_patt },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_rop },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_beta1 },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_surf_dst },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 
 static struct nouveau_omthds
 nv04_graph_prim_omthds[] = {
-       { 0x0184, nv01_graph_mthd_bind_clip },
-       { 0x0188, nv04_graph_mthd_bind_patt },
-       { 0x018c, nv04_graph_mthd_bind_rop },
-       { 0x0190, nv04_graph_mthd_bind_beta1 },
-       { 0x0194, nv04_graph_mthd_bind_beta4 },
-       { 0x0198, nv04_graph_mthd_bind_surf2d },
-       { 0x02fc, nv04_graph_mthd_set_operation },
+       { 0x0184, 0x0184, nv01_graph_mthd_bind_clip },
+       { 0x0188, 0x0188, nv04_graph_mthd_bind_patt },
+       { 0x018c, 0x018c, nv04_graph_mthd_bind_rop },
+       { 0x0190, 0x0190, nv04_graph_mthd_bind_beta1 },
+       { 0x0194, 0x0194, nv04_graph_mthd_bind_beta4 },
+       { 0x0198, 0x0198, nv04_graph_mthd_bind_surf2d },
+       { 0x02fc, 0x02fc, nv04_graph_mthd_set_operation },
        {}
 };
 

diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c
index 92521c89e77fc8a68bde0099d8a4d0ab973688e3..5c0f843ea2491af49724e18d8d6432b0beed90cd 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c
@@ -570,11 +570,11 @@ nv17_graph_mthd_lma_enable(struct nouveau_object *object, u32 mthd,
 
 static struct nouveau_omthds
 nv17_celcius_omthds[] = {
-       { 0x1638, nv17_graph_mthd_lma_window },
-       { 0x163c, nv17_graph_mthd_lma_window },
-       { 0x1640, nv17_graph_mthd_lma_window },
-       { 0x1644, nv17_graph_mthd_lma_window },
-       { 0x1658, nv17_graph_mthd_lma_enable },
+       { 0x1638, 0x1638, nv17_graph_mthd_lma_window },
+       { 0x163c, 0x163c, nv17_graph_mthd_lma_window },
+       { 0x1640, 0x1640, nv17_graph_mthd_lma_window },
+       { 0x1644, 0x1644, nv17_graph_mthd_lma_window },
+       { 0x1658, 0x1658, nv17_graph_mthd_lma_enable },
        {}
 };
 

diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c
index 1f394a2629e74846f60065111eaa7878de245b1e..9fd86375f4c48af81d1789771c61a0f9d1705a22 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c
+++ b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv31.c
@@ -121,9 +121,9 @@ nv31_mpeg_ofuncs = {
 
 static struct nouveau_omthds
 nv31_mpeg_omthds[] = {
-       { 0x0190, nv31_mpeg_mthd_dma },
-       { 0x01a0, nv31_mpeg_mthd_dma },
-       { 0x01b0, nv31_mpeg_mthd_dma },
+       { 0x0190, 0x0190, nv31_mpeg_mthd_dma },
+       { 0x01a0, 0x01a0, nv31_mpeg_mthd_dma },
+       { 0x01b0, 0x01b0, nv31_mpeg_mthd_dma },
        {}
 };
 

diff --git a/drivers/gpu/drm/nouveau/core/engine/software/nv04.c b/drivers/gpu/drm/nouveau/core/engine/software/nv04.c
index 3ca4c3aa90b7eac50fa053c3b8c93154cfcf2ba9..2a859a31c30d23c8c6d1c4989af56b75fa810b1d 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/software/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/software/nv04.c
@@ -63,8 +63,8 @@ nv04_software_flip(struct nouveau_object *object, u32 mthd,
 
 static struct nouveau_omthds
 nv04_software_omthds[] = {
-       { 0x0150, nv04_software_set_ref },
-       { 0x0500, nv04_software_flip },
+       { 0x0150, 0x0150, nv04_software_set_ref },
+       { 0x0500, 0x0500, nv04_software_flip },
        {}
 };
 

diff --git a/drivers/gpu/drm/nouveau/core/engine/software/nv10.c b/drivers/gpu/drm/nouveau/core/engine/software/nv10.c
index 6e699afbfdb7fc5a8a1c72ba1ff29f0ac77f5950..a019364b1e133382671a7abe37349da64ba30190 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/software/nv10.c
+++ b/drivers/gpu/drm/nouveau/core/engine/software/nv10.c
@@ -52,7 +52,7 @@ nv10_software_flip(struct nouveau_object *object, u32 mthd,
 
 static struct nouveau_omthds
 nv10_software_omthds[] = {
-       { 0x0500, nv10_software_flip },
+       { 0x0500, 0x0500, nv10_software_flip },
        {}
 };
 

diff --git a/drivers/gpu/drm/nouveau/core/engine/software/nv50.c b/drivers/gpu/drm/nouveau/core/engine/software/nv50.c
index a2edcd38544a5b705c53143d2369ef496f06650c..b0e7e1c01ce69b42d7c9150e2678858a07376663 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/software/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/software/nv50.c
@@ -117,11 +117,11 @@ nv50_software_mthd_flip(struct nouveau_object *object, u32 mthd,
 
 static struct nouveau_omthds
 nv50_software_omthds[] = {
-       { 0x018c, nv50_software_mthd_dma_vblsem },
-       { 0x0400, nv50_software_mthd_vblsem_offset },
-       { 0x0404, nv50_software_mthd_vblsem_value },
-       { 0x0408, nv50_software_mthd_vblsem_release },
-       { 0x0500, nv50_software_mthd_flip },
+       { 0x018c, 0x018c, nv50_software_mthd_dma_vblsem },
+       { 0x0400, 0x0400, nv50_software_mthd_vblsem_offset },
+       { 0x0404, 0x0404, nv50_software_mthd_vblsem_value },
+       { 0x0408, 0x0408, nv50_software_mthd_vblsem_release },
+       { 0x0500, 0x0500, nv50_software_mthd_flip },
        {}
 };
 

diff --git a/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c
index b7b0d7e330d61409b48c34606ade622712812e37..282a1cd1bc2facbc887ffe721763e0e0e9df34a0 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/software/nvc0.c
@@ -99,11 +99,11 @@ nvc0_software_mthd_flip(struct nouveau_object *object, u32 mthd,
 
 static struct nouveau_omthds
 nvc0_software_omthds[] = {
-       { 0x0400, nvc0_software_mthd_vblsem_offset },
-       { 0x0404, nvc0_software_mthd_vblsem_offset },
-       { 0x0408, nvc0_software_mthd_vblsem_value },
-       { 0x040c, nvc0_software_mthd_vblsem_release },
-       { 0x0500, nvc0_software_mthd_flip },
+       { 0x0400, 0x0400, nvc0_software_mthd_vblsem_offset },
+       { 0x0404, 0x0404, nvc0_software_mthd_vblsem_offset },
+       { 0x0408, 0x0408, nvc0_software_mthd_vblsem_value },
+       { 0x040c, 0x040c, nvc0_software_mthd_vblsem_release },
+       { 0x0500, 0x0500, nvc0_software_mthd_flip },
        {}
 };
 

diff --git a/drivers/gpu/drm/nouveau/core/include/core/object.h b/drivers/gpu/drm/nouveau/core/include/core/object.h
index eee1c7bca0a39cb2ef8a8b1b9e196df05d24ccd9..27d17a9852e5b828d5b296d06c20cdadca7cc683 100644 (file)
--- a/drivers/gpu/drm/nouveau/core/include/core/object.h
+++ b/drivers/gpu/drm/nouveau/core/include/core/object.h
@@ -70,7 +70,8 @@ nv_pclass(struct nouveau_object *parent, u32 oclass)
 }
 
 struct nouveau_omthds {
-       u32 method;
+       u32 start;
+       u32 limit;
        int (*call)(struct nouveau_object *, u32, void *, u32);
 };
 
@@ -114,7 +115,7 @@ nv_exec(void *obj, u32 mthd, void *data, u32 size)
        struct nouveau_omthds *method = nv_oclass(obj)->omthds;
 
        while (method && method->call) {
-               if (method->method == mthd)
+               if (mthd >= method->start && mthd <= method->limit)
                        return method->call(obj, mthd, data, size);
                method++;
        }