[COMMON] hsi2c: exynos5: Fix naming of Fast plus mode
authorKyungwoo Kang <kwoo.kang@samsung.com>
Tue, 20 Mar 2018 04:59:21 +0000 (13:59 +0900)
committermyung-su.cha <myung-su.cha@samsung.com>
Wed, 9 May 2018 12:14:45 +0000 (21:14 +0900)
Previously Fast plus mode naming has been declared standard mode.

Change-Id: I6b67ac08821485a55b3ee354ea9ae5d54e3c6e5d
Signed-off-by: Kyungwoo Kang <kwoo.kang@samsung.com>
drivers/i2c/busses/i2c-exynos5.c
drivers/i2c/busses/i2c-exynos5.h

index da72eef6e883849b18bc23560a1757b13b08d226..5d144a1575d3ac37fb8bb756cbc1dc111df196d3 100644 (file)
@@ -190,12 +190,12 @@ static LIST_HEAD(drvdata_list);
  * Controller operating frequency, timing values for operation
  * are calculated against this frequency
  */
-#define HSI2C_STAND_TX_CLOCK   1000000
-#define HSI2C_HS_TX_CLOCK      2500000
-#define HSI2C_FS_TX_CLOCK      400000
-#define HSI2C_STAND_SPD        2
-#define HSI2C_HIGH_SPD         1
-#define HSI2C_FAST_SPD         0
+#define HSI2C_HS_TX_CLOCK                      2500000
+#define HSI2C_FAST_PLUS_TX_CLOCK       1000000
+#define HSI2C_FS_TX_CLOCK                      400000
+#define HSI2C_FAST_PLUS_SPD            2
+#define HSI2C_HIGH_SPD                 1
+#define HSI2C_FAST_SPD                 0
 
 #define HSI2C_POLLING 0
 #define HSI2C_INTERRUPT 1
@@ -389,8 +389,8 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, int mode)
 
        ipclk = (unsigned int)clk_get_rate(i2c->rate_clk);
 
-       if (mode == HSI2C_STAND_SPD) {
-               op_clk = i2c->stand_clock;
+       if (mode == HSI2C_FAST_PLUS_SPD) {
+               op_clk = i2c->fs_plus_clock;
 
                fs_div = ipclk / (op_clk * 16);
                fs_div &= 0xFF;
@@ -407,8 +407,8 @@ static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, int mode)
                utemp = readl(i2c->regs + HSI2C_TIMING_FS1) & ~0x00FF0000;
                writel(utemp | (uTSTART_HD_FS << 16), i2c->regs + HSI2C_TIMING_FS1);
 
-               dev_info(i2c->dev, "%s IPCLK = %d OP_CLK = %d DIV = %d Timing FS1(ST) = 0x%X "
-                               "TIMING FS2(ST) = 0x%X TIMING FS3(ST) = 0x%X\n",__func__, ipclk, op_clk, fs_div,
+               dev_info(i2c->dev, "%s IPCLK = %d OP_CLK = %d DIV = %d Timing FS1(FS+) = 0x%X "
+                               "TIMING FS2(FS+) = 0x%X TIMING FS3(FS+) = 0x%X\n",__func__, ipclk, op_clk, fs_div,
                                readl(i2c->regs + HSI2C_TIMING_FS1), readl(i2c->regs + HSI2C_TIMING_FS2),
                                readl(i2c->regs + HSI2C_TIMING_FS3));
        } else if (mode == HSI2C_HIGH_SPD) {
@@ -489,10 +489,10 @@ static int exynos5_hsi2c_clock_setup(struct exynos5_i2c *i2c)
                }
        }
 
-       /* Configure the Standard mode timing values */
-       if (i2c->speed_mode == HSI2C_STAND_SPD) {
-               if (exynos5_i2c_set_timing(i2c, HSI2C_STAND_SPD)) {
-                       dev_err(i2c->dev, "HSI2C STANDARD Clock set up failed\n");
+       /* Configure the fast plus mode timing values */
+       if (i2c->speed_mode == HSI2C_FAST_PLUS_SPD) {
+               if (exynos5_i2c_set_timing(i2c, HSI2C_FAST_PLUS_SPD)) {
+                       dev_err(i2c->dev, "HSI2C FAST PLUS Clock set up failed\n");
                        return -EINVAL;
                }
        }
@@ -1043,15 +1043,13 @@ static int exynos5_i2c_probe(struct platform_device *pdev)
        if (of_property_read_u32(np, "default-clk", &i2c->default_clk))
                dev_err(i2c->dev, "Failed to get default clk info\n");
 
-       /* Mode of operation High/Fast/Standard Speed mode */
-       if (of_get_property(np, "samsung,stand-mode", NULL)) {
-               i2c->speed_mode = HSI2C_STAND_SPD;
-               i2c->fs_clock = HSI2C_FS_TX_CLOCK;
-               if (of_property_read_u32(np, "clock-frequency", &i2c->stand_clock))
-                       i2c->stand_clock = HSI2C_STAND_TX_CLOCK;
+       /* Mode of operation High/Fast/Fast+ Speed mode */
+       if (of_get_property(np, "samsung,fast-plus-mode", NULL)) {
+               i2c->speed_mode = HSI2C_FAST_PLUS_SPD;
+               if (of_property_read_u32(np, "clock-frequency", &i2c->fs_plus_clock))
+                       i2c->fs_plus_clock = HSI2C_FAST_PLUS_TX_CLOCK;
        } else if (of_get_property(np, "samsung,hs-mode", NULL)) {
                i2c->speed_mode = HSI2C_HIGH_SPD;
-               i2c->fs_clock = HSI2C_FS_TX_CLOCK;
                if (of_property_read_u32(np, "clock-frequency", &i2c->hs_clock))
                        i2c->hs_clock = HSI2C_HS_TX_CLOCK;
        } else {
index 0fcc2dc5b61f0eccaf65b00530d1897d9c2153b3..358610d9e5164029e10ece23c3911bd46de0ce9d 100644 (file)
@@ -40,7 +40,7 @@ struct exynos5_i2c {
        /* Controller operating frequency */
        unsigned int            fs_clock;
        unsigned int            hs_clock;
-       unsigned int            stand_clock;
+       unsigned int            fs_plus_clock;
 
        /* to set the source clock */
        unsigned int            default_clk;