ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register
authorKeerthy <j-keerthy@ti.com>
Thu, 16 Jul 2015 11:53:16 +0000 (17:23 +0530)
committerPaul Walmsley <paul@pwsan.com>
Thu, 23 Jul 2015 11:27:00 +0000 (05:27 -0600)
PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence
remove hardcoding and use the value provided by the omap_prcm_irq_setup
structure. This is done to support IO wakeup on am437x series.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/prcm-common.h
arch/arm/mach-omap2/prm44xx.c

index 6ae0b3a1781e99deee4f2cdc8699a4f434ad7fa3..af0cee0881de7b66bbd47dd2d67e537d33950ef2 100644 (file)
@@ -472,6 +472,7 @@ struct omap_prcm_irq {
  * struct omap_prcm_irq_setup - PRCM interrupt controller details
  * @ack: PRM register offset for the first PRM_IRQSTATUS_MPU register
  * @mask: PRM register offset for the first PRM_IRQENABLE_MPU register
+ * @pm_ctrl: PRM register offset for the PRM_IO_PMCTRL register
  * @nr_regs: number of PRM_IRQ{STATUS,ENABLE}_MPU* registers
  * @nr_irqs: number of entries in the @irqs array
  * @irqs: ptr to an array of PRCM interrupt bits (see @nr_irqs)
@@ -494,6 +495,7 @@ struct omap_prcm_irq {
 struct omap_prcm_irq_setup {
        u16 ack;
        u16 mask;
+       u16 pm_ctrl;
        u8 nr_regs;
        u8 nr_irqs;
        const struct omap_prcm_irq *irqs;
index 4541700f743a871fbd139512856c1de327745d8b..8149e5a53743d0baef07ffba86da1b8faa2e4f33 100644 (file)
@@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
 static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
        .ack                    = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
        .mask                   = OMAP4_PRM_IRQENABLE_MPU_OFFSET,
+       .pm_ctrl                = OMAP4_PRM_IO_PMCTRL_OFFSET,
        .nr_regs                = 2,
        .irqs                   = omap4_prcm_irqs,
        .nr_irqs                = ARRAY_SIZE(omap4_prcm_irqs),
@@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
        omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
                                    OMAP4430_WUCLK_CTRL_MASK,
                                    inst,
-                                   OMAP4_PRM_IO_PMCTRL_OFFSET);
+                                   omap4_prcm_irq_setup.pm_ctrl);
        omap_test_timeout(
                (((omap4_prm_read_inst_reg(inst,
-                                          OMAP4_PRM_IO_PMCTRL_OFFSET) &
+                                          omap4_prcm_irq_setup.pm_ctrl) &
                   OMAP4430_WUCLK_STATUS_MASK) >>
                  OMAP4430_WUCLK_STATUS_SHIFT) == 1),
                MAX_IOPAD_LATCH_TIME, i);
@@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
        /* Trigger WUCLKIN disable */
        omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
                                    inst,
-                                   OMAP4_PRM_IO_PMCTRL_OFFSET);
+                                   omap4_prcm_irq_setup.pm_ctrl);
        omap_test_timeout(
                (((omap4_prm_read_inst_reg(inst,
-                                          OMAP4_PRM_IO_PMCTRL_OFFSET) &
+                                          omap4_prcm_irq_setup.pm_ctrl) &
                   OMAP4430_WUCLK_STATUS_MASK) >>
                  OMAP4430_WUCLK_STATUS_SHIFT) == 0),
                MAX_IOPAD_LATCH_TIME, i);
@@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
        omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
                                    OMAP4430_GLOBAL_WUEN_MASK,
                                    inst,
-                                   OMAP4_PRM_IO_PMCTRL_OFFSET);
+                                   omap4_prcm_irq_setup.pm_ctrl);
 }
 
 /**