(pid == SILICOM_PEG2BPI5_SSID))
#define PEG80_IF_SERIES(pid) \
-((pid==SILICOM_M1E2G4BPi80_SSID)|| \
-(pid==SILICOM_M6E2G8BPi80_SSID)|| \
-(pid==SILICOM_PE2G4BPi80L_SSID)|| \
-(pid==SILICOM_M6E2G8BPi80A_SSID)|| \
-(pid==SILICOM_PE2G2BPi35_SSID)|| \
-(pid==SILICOM_PAC1200BPi35_SSID)|| \
-(pid==SILICOM_PE2G4BPi35_SSID)|| \
-(pid==SILICOM_PE2G4BPi35L_SSID)|| \
-(pid==SILICOM_PE2G6BPi35_SSID)|| \
-(pid==SILICOM_PE2G2BPi80_SSID)|| \
-(pid==SILICOM_PE2G4BPi80_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi80ZX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G2BPFi35ZX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35LX_SSID)|| \
-(pid==SILICOM_PE2G4BPFi35ZX_SSID))
+ ((pid == SILICOM_M1E2G4BPi80_SSID) || \
+ (pid == SILICOM_M6E2G8BPi80_SSID) || \
+ (pid == SILICOM_PE2G4BPi80L_SSID) || \
+ (pid == SILICOM_M6E2G8BPi80A_SSID) || \
+ (pid == SILICOM_PE2G2BPi35_SSID) || \
+ (pid == SILICOM_PAC1200BPi35_SSID) || \
+ (pid == SILICOM_PE2G4BPi35_SSID) || \
+ (pid == SILICOM_PE2G4BPi35L_SSID) || \
+ (pid == SILICOM_PE2G6BPi35_SSID) || \
+ (pid == SILICOM_PE2G2BPi80_SSID) || \
+ (pid == SILICOM_PE2G4BPi80_SSID) || \
+ (pid == SILICOM_PE2G4BPFi80_SSID) || \
+ (pid == SILICOM_PE2G4BPFi80LX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi80ZX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi80_SSID) || \
+ (pid == SILICOM_PE2G2BPFi80LX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi80ZX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi35_SSID) || \
+ (pid == SILICOM_PE2G2BPFi35LX_SSID) || \
+ (pid == SILICOM_PE2G2BPFi35ZX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi35_SSID) || \
+ (pid == SILICOM_PE2G4BPFi35LX_SSID) || \
+ (pid == SILICOM_PE2G4BPFi35ZX_SSID))
#define PEGF80_IF_SERIES(pid) \
((pid==SILICOM_PE2G4BPFi80_SSID)|| \