ret = of_address_to_resource(np, 0, &resource);
if (ret) {
dev_warn(&ofdev->dev, "invalid address\n");
- goto out;
+ goto err_unprepare;
}
spin_lock_init(&port->lock);
dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
prop);
ret = -EINVAL;
- goto out;
+ goto err_dispose;
}
}
info->rst = devm_reset_control_get_optional_shared(&ofdev->dev, NULL);
if (IS_ERR(info->rst))
- goto out;
+ goto err_dispose;
ret = reset_control_deassert(info->rst);
if (ret)
- goto out;
+ goto err_dispose;
port->type = type;
port->uartclk = clk;
port->handle_irq = fsl8250_handle_irq;
return 0;
-out:
+err_dispose:
+ irq_dispose_mapping(port->irq);
+err_unprepare:
if (info->clk)
clk_disable_unprepare(info->clk);
return ret;
memset(&port8250, 0, sizeof(port8250));
ret = of_platform_serial_setup(ofdev, port_type, &port8250.port, info);
if (ret)
- goto out;
+ goto err_free;
if (port8250.port.fifosize)
port8250.capabilities = UART_CAP_FIFO;
ret = serial8250_register_8250_port(&port8250);
if (ret < 0)
- goto out;
+ goto err_dispose;
info->type = port_type;
info->line = ret;
platform_set_drvdata(ofdev, info);
return 0;
-out:
- kfree(info);
+err_dispose:
irq_dispose_mapping(port8250.port.irq);
+ if (info->clk)
+ clk_disable_unprepare(info->clk);
+err_free:
+ kfree(info);
return ret;
}