* by then we return error.
*/
time = 0;
- while (TRUE) {
+ while (true) {
val64 = readq(&bar0->rti_command_mem);
if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
break;
herc = (sp->device_type == XFRAME_II_DEVICE);
- if (flag == FALSE) {
+ if (flag == false) {
if ((!herc && (sp->pdev->revision >= 4)) || herc) {
if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
ret = 1;
writeq(val64, &bar0->pcc_err_reg);
}
- sp->device_enabled_once = FALSE;
+ sp->device_enabled_once = false;
}
/**
val64 = readq(&bar0->rmac_pause_cfg);
if (val64 & RMAC_PAUSE_GEN_ENABLE)
- ep->tx_pause = TRUE;
+ ep->tx_pause = true;
if (val64 & RMAC_PAUSE_RX_ENABLE)
- ep->rx_pause = TRUE;
- ep->autoneg = FALSE;
+ ep->rx_pause = true;
+ ep->autoneg = false;
}
/**
val64 |= ADAPTER_LED_ON;
writeq(val64, &bar0->adapter_control);
}
- nic->device_enabled_once = TRUE;
+ nic->device_enabled_once = true;
} else {
DBG_PRINT(ERR_DBG, "%s: Error: ", dev->name);
DBG_PRINT(ERR_DBG, "device is not Quiescent\n");
struct s2io_nic *sp;
struct net_device *dev;
int i, j, ret;
- int dma_flag = FALSE;
+ int dma_flag = false;
u32 mac_up, mac_down;
u64 val64 = 0, tmp64 = 0;
struct XENA_dev_config __iomem *bar0 = NULL;
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n");
- dma_flag = TRUE;
+ dma_flag = true;
if (pci_set_consistent_dma_mask
(pdev, DMA_BIT_MASK(64))) {
DBG_PRINT(ERR_DBG,
sp->dev = dev;
sp->pdev = pdev;
sp->high_dma_flag = dma_flag;
- sp->device_enabled_once = FALSE;
+ sp->device_enabled_once = false;
if (rx_ring_mode == 1)
sp->rxd_mode = RXD_MODE_1;
if (rx_ring_mode == 2)
dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
- if (sp->high_dma_flag == TRUE)
+ if (sp->high_dma_flag == true)
dev->features |= NETIF_F_HIGHDMA;
dev->features |= NETIF_F_TSO;
dev->features |= NETIF_F_TSO6;