drm/amdgpu: remove redundant outer loop and remove commented out code

The outer loop is redundant and can be removed as it is doing nothing
useful. Also remove some commented out code that is not being used.

Detected by CoverityScan, CID#1402073

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
index 10421b6083ea302c2853c2631d9954ef9ff47152..49a6c45e65be45757e207c32e678b4328bddb5d2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c
@@ -274,24 +274,14 @@ static int vce_v2_0_start(struct amdgpu_device *adev)
 
 static int vce_v2_0_stop(struct amdgpu_device *adev)
 {
-       int i, j;
+       int i;
        int status;
 
        if (vce_v2_0_lmi_clean(adev)) {
                DRM_INFO("vce is not idle \n");
                return 0;
        }
-/*
-       for (i = 0; i < 10; ++i) {
-               for (j = 0; j < 100; ++j) {
-                       status = RREG32(mmVCE_FW_REG_STATUS);
-                       if (!(status & 1))
-                               break;
-                       mdelay(1);
-               }
-               break;
-       }
-*/
+
        if (vce_v2_0_wait_for_idle(adev)) {
                DRM_INFO("VCE is busy, Can't set clock gateing");
                return 0;
@@ -300,14 +290,11 @@ static int vce_v2_0_stop(struct amdgpu_device *adev)
        /* Stall UMC and register bus before resetting VCPU */
        WREG32_P(mmVCE_LMI_CTRL2, 1 << 8, ~(1 << 8));
 
-       for (i = 0; i < 10; ++i) {
-               for (j = 0; j < 100; ++j) {
-                       status = RREG32(mmVCE_LMI_STATUS);
-                       if (status & 0x240)
-                               break;
-                       mdelay(1);
-               }
-               break;
+       for (i = 0; i < 100; ++i) {
+               status = RREG32(mmVCE_LMI_STATUS);
+               if (status & 0x240)
+                       break;
+               mdelay(1);
        }
 
        WREG32_P(mmVCE_VCPU_CNTL, 0, ~0x80001);