vfio: powerpc/spapr/iommu/powernv/ioda2: Rework IOMMU ownership control

This adds tce_iommu_take_ownership() and tce_iommu_release_ownership
which call in a loop iommu_take_ownership()/iommu_release_ownership()
for every table on the group. As there is just one now, no change in
behaviour is expected.

At the moment the iommu_table struct has a set_bypass() which enables/
disables DMA bypass on IODA2 PHB. This is exposed to POWERPC IOMMU code
which calls this callback when external IOMMU users such as VFIO are
about to get over a PHB.

The set_bypass() callback is not really an iommu_table function but
IOMMU/PE function. This introduces a iommu_table_group_ops struct and
adds take_ownership()/release_ownership() callbacks to it which are
called when an external user takes/releases control over the IOMMU.

This replaces set_bypass() with ownership callbacks as it is not
necessarily just bypass enabling, it can be something else/more
so let's give it more generic name.

The callbacks is implemented for IODA2 only. Other platforms (P5IOC2,
IODA1) will use the old iommu_take_ownership/iommu_release_ownership API.
The following patches will replace iommu_take_ownership/
iommu_release_ownership calls in IODA2 with full IOMMU table release/
create.

As we here and touching bypass control, this removes
pnv_pci_ioda2_setup_bypass_pe() as it does not do much
more compared to pnv_pci_ioda2_set_bypass. This moves tce_bypass_base
initialization to pnv_pci_ioda2_setup_dma_pe.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
[aw: for the vfio related changes]
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 44a20ccf06b4441b75338d3e35b7c972c720c449..489133cf7c5e1410290d487bd17babb658636307 100644 (file)
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -93,7 +93,6 @@ struct iommu_table {
        unsigned long  it_page_shift;/* table iommu page size */
        struct list_head it_group_list;/* List of iommu_table_group_link */
        struct iommu_table_ops *it_ops;
-       void (*set_bypass)(struct iommu_table *tbl, bool enable);
 };
 
 /* Pure 2^n version of get_order */
@@ -126,6 +125,15 @@ extern struct iommu_table *iommu_init_table(struct iommu_table * tbl,
                                            int nid);
 #define IOMMU_TABLE_GROUP_MAX_TABLES   1
 
+struct iommu_table_group;
+
+struct iommu_table_group_ops {
+       /* Switch ownership from platform code to external user (e.g. VFIO) */
+       void (*take_ownership)(struct iommu_table_group *table_group);
+       /* Switch ownership from external user (e.g. VFIO) back to core */
+       void (*release_ownership)(struct iommu_table_group *table_group);
+};
+
 struct iommu_table_group_link {
        struct list_head next;
        struct rcu_head rcu;
@@ -135,6 +143,7 @@ struct iommu_table_group_link {
 struct iommu_table_group {
        struct iommu_group *group;
        struct iommu_table *tables[IOMMU_TABLE_GROUP_MAX_TABLES];
+       struct iommu_table_group_ops *ops;
 };
 
 #ifdef CONFIG_IOMMU_API

diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index be258b2ecb10356548e8b75608e1e8ac7d231099..e7f81b7399ba2dca69050d9952d7cee1e6764899 100644 (file)
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -1047,14 +1047,6 @@ int iommu_take_ownership(struct iommu_table *tbl)
 
        memset(tbl->it_map, 0xff, sz);
 
-       /*
-        * Disable iommu bypass, otherwise the user can DMA to all of
-        * our physical memory via the bypass window instead of just
-        * the pages that has been explicitly mapped into the iommu
-        */
-       if (tbl->set_bypass)
-               tbl->set_bypass(tbl, false);
-
        return 0;
 }
 EXPORT_SYMBOL_GPL(iommu_take_ownership);
@@ -1068,10 +1060,6 @@ void iommu_release_ownership(struct iommu_table *tbl)
        /* Restore bit#0 set by iommu_init_table() */
        if (tbl->it_offset == 0)
                set_bit(0, tbl->it_map);
-
-       /* The kernel owns the device now, we can restore the iommu bypass */
-       if (tbl->set_bypass)
-               tbl->set_bypass(tbl, true);
 }
 EXPORT_SYMBOL_GPL(iommu_release_ownership);
 

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 3b4130697b05a15478417f6fd8d773fb5f282a19..17a77522ea0dd23ee6f85e358e62874f387bc12a 100644 (file)
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1919,13 +1919,8 @@ static void pnv_pci_ioda_setup_dma_pe(struct pnv_phb *phb,
        }
 }
 
-static void pnv_pci_ioda2_set_bypass(struct iommu_table *tbl, bool enable)
+static void pnv_pci_ioda2_set_bypass(struct pnv_ioda_pe *pe, bool enable)
 {
-       struct iommu_table_group_link *tgl = list_first_entry_or_null(
-                       &tbl->it_group_list, struct iommu_table_group_link,
-                       next);
-       struct pnv_ioda_pe *pe = container_of(tgl->table_group,
-                       struct pnv_ioda_pe, table_group);
        uint16_t window_id = (pe->pe_number << 1 ) + 1;
        int64_t rc;
 
@@ -1952,19 +1947,31 @@ static void pnv_pci_ioda2_set_bypass(struct iommu_table *tbl, bool enable)
                pe->tce_bypass_enabled = enable;
 }
 
-static void pnv_pci_ioda2_setup_bypass_pe(struct pnv_phb *phb,
-                                         struct pnv_ioda_pe *pe)
+#ifdef CONFIG_IOMMU_API
+static void pnv_ioda2_take_ownership(struct iommu_table_group *table_group)
 {
-       /* TVE #1 is selected by PCI address bit 59 */
-       pe->tce_bypass_base = 1ull << 59;
+       struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,
+                                               table_group);
 
-       /* Install set_bypass callback for VFIO */
-       pe->table_group.tables[0]->set_bypass = pnv_pci_ioda2_set_bypass;
+       iommu_take_ownership(table_group->tables[0]);
+       pnv_pci_ioda2_set_bypass(pe, false);
+}
 
-       /* Enable bypass by default */
-       pnv_pci_ioda2_set_bypass(pe->table_group.tables[0], true);
+static void pnv_ioda2_release_ownership(struct iommu_table_group *table_group)
+{
+       struct pnv_ioda_pe *pe = container_of(table_group, struct pnv_ioda_pe,
+                                               table_group);
+
+       iommu_release_ownership(table_group->tables[0]);
+       pnv_pci_ioda2_set_bypass(pe, true);
 }
 
+static struct iommu_table_group_ops pnv_pci_ioda2_ops = {
+       .take_ownership = pnv_ioda2_take_ownership,
+       .release_ownership = pnv_ioda2_release_ownership,
+};
+#endif
+
 static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
                                       struct pnv_ioda_pe *pe)
 {
@@ -1979,6 +1986,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
        if (WARN_ON(pe->tce32_seg >= 0))
                return;
 
+       /* TVE #1 is selected by PCI address bit 59 */
+       pe->tce_bypass_base = 1ull << 59;
+
        tbl = pnv_pci_table_alloc(phb->hose->node);
        iommu_register_group(&pe->table_group, phb->hose->global_number,
                        pe->pe_number);
@@ -2033,6 +2043,9 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
        }
        tbl->it_ops = &pnv_ioda2_iommu_ops;
        iommu_init_table(tbl, phb->hose->node);
+#ifdef CONFIG_IOMMU_API
+       pe->table_group.ops = &pnv_pci_ioda2_ops;
+#endif
 
        if (pe->flags & PNV_IODA_PE_DEV) {
                /*
@@ -2047,7 +2060,7 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb *phb,
 
        /* Also create a bypass window */
        if (!pnv_iommu_bypass_disabled)
-               pnv_pci_ioda2_setup_bypass_pe(phb, pe);
+               pnv_pci_ioda2_set_bypass(pe, true);
 
        return;
 fail:

diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c b/drivers/vfio/vfio_iommu_spapr_tce.c
index ffc634a75dba43b7b4337286d958e9674fd5fb26..9c720de46c3318bd24a336acdc485889be9ab51b 100644 (file)
--- a/drivers/vfio/vfio_iommu_spapr_tce.c
+++ b/drivers/vfio/vfio_iommu_spapr_tce.c
@@ -486,6 +486,61 @@ static long tce_iommu_ioctl(void *iommu_data,
        return -ENOTTY;
 }
 
+static void tce_iommu_release_ownership(struct tce_container *container,
+               struct iommu_table_group *table_group)
+{
+       int i;
+
+       for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {
+               struct iommu_table *tbl = table_group->tables[i];
+
+               if (!tbl)
+                       continue;
+
+               tce_iommu_clear(container, tbl, tbl->it_offset, tbl->it_size);
+               if (tbl->it_map)
+                       iommu_release_ownership(tbl);
+       }
+}
+
+static int tce_iommu_take_ownership(struct tce_container *container,
+               struct iommu_table_group *table_group)
+{
+       int i, j, rc = 0;
+
+       for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {
+               struct iommu_table *tbl = table_group->tables[i];
+
+               if (!tbl || !tbl->it_map)
+                       continue;
+
+               rc = iommu_take_ownership(tbl);
+               if (rc) {
+                       for (j = 0; j < i; ++j)
+                               iommu_release_ownership(
+                                               table_group->tables[j]);
+
+                       return rc;
+               }
+       }
+
+       return 0;
+}
+
+static void tce_iommu_release_ownership_ddw(struct tce_container *container,
+               struct iommu_table_group *table_group)
+{
+       table_group->ops->release_ownership(table_group);
+}
+
+static long tce_iommu_take_ownership_ddw(struct tce_container *container,
+               struct iommu_table_group *table_group)
+{
+       table_group->ops->take_ownership(table_group);
+
+       return 0;
+}
+
 static int tce_iommu_attach_group(void *iommu_data,
                struct iommu_group *iommu_group)
 {
@@ -518,7 +573,12 @@ static int tce_iommu_attach_group(void *iommu_data,
                goto unlock_exit;
        }
 
-       ret = iommu_take_ownership(table_group->tables[0]);
+       if (!table_group->ops || !table_group->ops->take_ownership ||
+                       !table_group->ops->release_ownership)
+               ret = tce_iommu_take_ownership(container, table_group);
+       else
+               ret = tce_iommu_take_ownership_ddw(container, table_group);
+
        if (!ret)
                container->grp = iommu_group;
 
@@ -533,7 +593,6 @@ static void tce_iommu_detach_group(void *iommu_data,
 {
        struct tce_container *container = iommu_data;
        struct iommu_table_group *table_group;
-       struct iommu_table *tbl;
 
        mutex_lock(&container->lock);
        if (iommu_group != container->grp) {
@@ -556,9 +615,10 @@ static void tce_iommu_detach_group(void *iommu_data,
        table_group = iommu_group_get_iommudata(iommu_group);
        BUG_ON(!table_group);
 
-       tbl = table_group->tables[0];
-       tce_iommu_clear(container, tbl, tbl->it_offset, tbl->it_size);
-       iommu_release_ownership(tbl);
+       if (!table_group->ops || !table_group->ops->release_ownership)
+               tce_iommu_release_ownership(container, table_group);
+       else
+               tce_iommu_release_ownership_ddw(container, table_group);
 
 unlock_exit:
        mutex_unlock(&container->lock);