ARM: dts: NSP: modify second CPU address
authorJon Mason <jonmason@broadcom.com>
Thu, 5 May 2016 23:29:31 +0000 (19:29 -0400)
committerFlorian Fainelli <f.fainelli@gmail.com>
Tue, 31 May 2016 17:56:10 +0000 (10:56 -0700)
NSP B0 has a different address for the second core.  Since there should
not be any Ax versions in the field, it should be safe to universally
change this.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
arch/arm/boot/dts/bcm-nsp.dtsi

index a44bf29fc5b6a9b068517d9cc09db72c43646f70..1759e650d2258fa5928a247e87d50d927fb8fbc9 100644 (file)
@@ -57,7 +57,7 @@
                        compatible = "arm,cortex-a9";
                        next-level-cache = <&L2>;
                        enable-method = "brcm,bcm-nsp-smp";
-                       secondary-boot-reg = <0xffff042c>;
+                       secondary-boot-reg = <0xffff0fec>;
                        reg = <0x1>;
                };
        };