drm/radeon/kms: make ring_start, ring_test, and ib_test per ring
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 23 Feb 2012 22:53:45 +0000 (17:53 -0500)
committerDave Airlie <airlied@redhat.com>
Wed, 29 Feb 2012 10:14:47 +0000 (10:14 +0000)
Each ring type may need a different variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König<christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
15 files changed:
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/ni.c
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/r420.c
drivers/gpu/drm/radeon/r520.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_asic.c
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/rs400.c
drivers/gpu/drm/radeon/rs600.c
drivers/gpu/drm/radeon/rs690.c
drivers/gpu/drm/radeon/rv515.c
drivers/gpu/drm/radeon/rv770.c

index 4350a3fe4ec5045f3702e1c09755cd7e1300e9b9..450b01d915e29b996af261eee06653ee1eab6057 100644 (file)
@@ -1539,7 +1539,7 @@ int evergreen_cp_resume(struct radeon_device *rdev)
 
        evergreen_cp_start(rdev);
        ring->ready = true;
-       r = radeon_ring_test(rdev, ring);
+       r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);
        if (r) {
                ring->ready = false;
                return r;
@@ -3237,7 +3237,7 @@ static int evergreen_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                DRM_ERROR("radeon: failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 6863a053861521c73c69dd0e07b975f1aa373aa4..8ce7f9973a5cb45c394851f9f54ab738e59dbefa 100644 (file)
@@ -1318,7 +1318,7 @@ int cayman_cp_resume(struct radeon_device *rdev)
        rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
        rdev->ring[CAYMAN_RING_TYPE_CP2_INDEX].ready = false;
        /* this only test cp0 */
-       r = radeon_ring_test(rdev, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
+       r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = false;
                rdev->ring[CAYMAN_RING_TYPE_CP1_INDEX].ready = false;
@@ -1518,7 +1518,7 @@ static int cayman_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                DRM_ERROR("radeon: failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 65fe8e092a1856c52aa4bfb47389a98f897bdd21..844f20cf873d6617bcb0c154d7b5fd2340a9ce4e 100644 (file)
@@ -970,9 +970,8 @@ static int r100_cp_wait_for_idle(struct radeon_device *rdev)
        return -1;
 }
 
-void r100_ring_start(struct radeon_device *rdev)
+void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
 {
-       struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
        int r;
 
        r = radeon_ring_lock(rdev, ring, 2);
@@ -1183,8 +1182,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
        WREG32(RADEON_CP_RB_WPTR_DELAY, 0);
        WREG32(RADEON_CP_CSQ_MODE, 0x00004D4D);
        WREG32(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIBM_INDBM);
-       radeon_ring_start(rdev);
-       r = radeon_ring_test(rdev, ring);
+       radeon_ring_start(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
+       r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);
        if (r) {
                DRM_ERROR("radeon: cp isn't working (%d).\n", r);
                return r;
@@ -3743,7 +3742,7 @@ void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
        radeon_ring_write(ring, ib->length_dw);
 }
 
-int r100_ib_test(struct radeon_device *rdev)
+int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
 {
        struct radeon_ib *ib;
        uint32_t scratch;
@@ -3968,7 +3967,7 @@ static int r100_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 3fc0d29a5f39e439e398a0f1e693a0e19b705c73..c42729456a07de7cf9b0beb8ada117f5a955471d 100644 (file)
@@ -206,9 +206,8 @@ void r300_fence_ring_emit(struct radeon_device *rdev,
        radeon_ring_write(ring, RADEON_SW_INT_FIRE);
 }
 
-void r300_ring_start(struct radeon_device *rdev)
+void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
 {
-       struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
        unsigned gb_tile_config;
        int r;
 
@@ -1419,7 +1418,7 @@ static int r300_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 666e28fe509c4fb44293af49555a29ab974f9098..d0f2c0363c27cbe332abdbc7263bf0dafb669e80 100644 (file)
@@ -279,7 +279,7 @@ static int r420_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 2e1087a2b97338fbcb85e0cdd3f5f9c359761629..422923ce70b6e64cea4780c4f0311901af2db80a 100644 (file)
@@ -207,7 +207,7 @@ static int r520_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 4cfb90be7241aa166ea085b1e211a5869568a0da..8a6d68c028d3a28bc1f44c3863e6af06bc980559 100644 (file)
@@ -2226,7 +2226,7 @@ int r600_cp_resume(struct radeon_device *rdev)
 
        r600_cp_start(rdev);
        ring->ready = true;
-       r = radeon_ring_test(rdev, ring);
+       r = radeon_ring_test(rdev, RADEON_RING_TYPE_GFX_INDEX, ring);
        if (r) {
                ring->ready = false;
                return r;
@@ -2490,7 +2490,7 @@ int r600_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                DRM_ERROR("radeon: failed testing IB (%d).\n", r);
                rdev->accel_working = false;
@@ -2697,13 +2697,14 @@ void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
        radeon_ring_write(ring, ib->length_dw);
 }
 
-int r600_ib_test(struct radeon_device *rdev, int ring)
+int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
 {
        struct radeon_ib *ib;
        uint32_t scratch;
        uint32_t tmp = 0;
        unsigned i;
        int r;
+       int ring_index = radeon_ring_index(rdev, ring);
 
        r = radeon_scratch_get(rdev, &scratch);
        if (r) {
@@ -2711,7 +2712,7 @@ int r600_ib_test(struct radeon_device *rdev, int ring)
                return r;
        }
        WREG32(scratch, 0xCAFEDEAD);
-       r = radeon_ib_get(rdev, ring, &ib, 256);
+       r = radeon_ib_get(rdev, ring_index, &ib, 256);
        if (r) {
                DRM_ERROR("radeon: failed to get ib (%d).\n", r);
                return r;
index 29efb73af5dee6ab6c5cc9d236b18116d97d875b..619e200fbf1c9aeac4e8d253c6c10f211ec0c240 100644 (file)
@@ -783,7 +783,6 @@ int radeon_ib_pool_init(struct radeon_device *rdev);
 void radeon_ib_pool_fini(struct radeon_device *rdev);
 int radeon_ib_pool_start(struct radeon_device *rdev);
 int radeon_ib_pool_suspend(struct radeon_device *rdev);
-int radeon_ib_test(struct radeon_device *rdev);
 /* Ring access between begin & end cannot sleep */
 int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *cp);
 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *cp);
@@ -1136,8 +1135,6 @@ struct radeon_asic {
        int (*asic_reset)(struct radeon_device *rdev);
        void (*gart_tlb_flush)(struct radeon_device *rdev);
        int (*gart_set_page)(struct radeon_device *rdev, int i, uint64_t addr);
-       void (*ring_start)(struct radeon_device *rdev);
-
        struct {
                void (*ib_execute)(struct radeon_device *rdev, struct radeon_ib *ib);
                int (*ib_parse)(struct radeon_device *rdev, struct radeon_ib *ib);
@@ -1145,10 +1142,11 @@ struct radeon_asic {
                void (*emit_semaphore)(struct radeon_device *rdev, struct radeon_ring *cp,
                                       struct radeon_semaphore *semaphore, bool emit_wait);
                int (*cs_parse)(struct radeon_cs_parser *p);
+               void (*ring_start)(struct radeon_device *rdev, struct radeon_ring *cp);
+               int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
+               int (*ib_test)(struct radeon_device *rdev, struct radeon_ring *cp);
        } ring[RADEON_NUM_RINGS];
 
-       int (*ring_test)(struct radeon_device *rdev, struct radeon_ring *cp);
-
        struct {
                int (*set)(struct radeon_device *rdev);
                int (*process)(struct radeon_device *rdev);
@@ -1677,8 +1675,9 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
 #define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))
 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart_tlb_flush((rdev))
 #define radeon_gart_set_page(rdev, i, p) (rdev)->asic->gart_set_page((rdev), (i), (p))
-#define radeon_ring_start(rdev) (rdev)->asic->ring_start((rdev))
-#define radeon_ring_test(rdev, cp) (rdev)->asic->ring_test((rdev), (cp))
+#define radeon_ring_start(rdev, r, cp) (rdev)->asic->ring[(r)].ring_start((rdev), (cp))
+#define radeon_ring_test(rdev, r, cp) (rdev)->asic->ring[(r)].ring_test((rdev), (cp))
+#define radeon_ib_test(rdev, r, cp) (rdev)->asic->ring[(r)].ib_test((rdev), (cp))
 #define radeon_ring_ib_execute(rdev, r, ib) (rdev)->asic->ring[(r)].ib_execute((rdev), (ib))
 #define radeon_ring_ib_parse(rdev, r, ib) (rdev)->asic->ring[(r)].ib_parse((rdev), (ib))
 #define radeon_irq_set(rdev) (rdev)->asic->irq.set((rdev))
index a7b6c37d8fa44cdcb9aed2c5be3efb9c52c5edb7..85e13502e80f0cb489f842da5144853161533df5 100644 (file)
@@ -138,14 +138,15 @@ static struct radeon_asic r100_asic = {
        .asic_reset = &r100_asic_reset,
        .gart_tlb_flush = &r100_pci_gart_tlb_flush,
        .gart_set_page = &r100_pci_gart_set_page,
-       .ring_start = &r100_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r100_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r100_cs_parse,
+                       .ring_start = &r100_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -205,14 +206,15 @@ static struct radeon_asic r200_asic = {
        .asic_reset = &r100_asic_reset,
        .gart_tlb_flush = &r100_pci_gart_tlb_flush,
        .gart_set_page = &r100_pci_gart_set_page,
-       .ring_start = &r100_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r100_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r100_cs_parse,
+                       .ring_start = &r100_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -271,14 +273,15 @@ static struct radeon_asic r300_asic = {
        .asic_reset = &r300_asic_reset,
        .gart_tlb_flush = &r100_pci_gart_tlb_flush,
        .gart_set_page = &r100_pci_gart_set_page,
-       .ring_start = &r300_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &r300_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -338,14 +341,15 @@ static struct radeon_asic r300_asic_pcie = {
        .asic_reset = &r300_asic_reset,
        .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
        .gart_set_page = &rv370_pcie_gart_set_page,
-       .ring_start = &r300_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &r300_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -404,14 +408,15 @@ static struct radeon_asic r420_asic = {
        .asic_reset = &r300_asic_reset,
        .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
        .gart_set_page = &rv370_pcie_gart_set_page,
-       .ring_start = &r300_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &r300_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -471,14 +476,15 @@ static struct radeon_asic rs400_asic = {
        .asic_reset = &r300_asic_reset,
        .gart_tlb_flush = &rs400_gart_tlb_flush,
        .gart_set_page = &rs400_gart_set_page,
-       .ring_start = &r300_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &r300_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -538,14 +544,15 @@ static struct radeon_asic rs600_asic = {
        .asic_reset = &rs600_asic_reset,
        .gart_tlb_flush = &rs600_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_start = &r300_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &r300_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -605,14 +612,15 @@ static struct radeon_asic rs690_asic = {
        .asic_reset = &rs600_asic_reset,
        .gart_tlb_flush = &rs400_gart_tlb_flush,
        .gart_set_page = &rs400_gart_set_page,
-       .ring_start = &r300_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &r300_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -672,14 +680,15 @@ static struct radeon_asic rv515_asic = {
        .asic_reset = &rs600_asic_reset,
        .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
        .gart_set_page = &rv370_pcie_gart_set_page,
-       .ring_start = &rv515_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &rv515_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -739,14 +748,15 @@ static struct radeon_asic r520_asic = {
        .asic_reset = &rs600_asic_reset,
        .gart_tlb_flush = &rv370_pcie_gart_tlb_flush,
        .gart_set_page = &rv370_pcie_gart_set_page,
-       .ring_start = &rv515_ring_start,
-       .ring_test = &r100_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r100_ring_ib_execute,
                        .emit_fence = &r300_fence_ring_emit,
                        .emit_semaphore = &r100_semaphore_ring_emit,
                        .cs_parse = &r300_cs_parse,
+                       .ring_start = &rv515_ring_start,
+                       .ring_test = &r100_ring_test,
+                       .ib_test = &r100_ib_test,
                }
        },
        .irq = {
@@ -806,13 +816,14 @@ static struct radeon_asic r600_asic = {
        .asic_reset = &r600_asic_reset,
        .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_test = &r600_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r600_ring_ib_execute,
                        .emit_fence = &r600_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &r600_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                }
        },
        .irq = {
@@ -872,13 +883,14 @@ static struct radeon_asic rs780_asic = {
        .asic_reset = &r600_asic_reset,
        .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_test = &r600_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r600_ring_ib_execute,
                        .emit_fence = &r600_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &r600_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                }
        },
        .irq = {
@@ -938,13 +950,14 @@ static struct radeon_asic rv770_asic = {
        .vga_set_state = &r600_vga_set_state,
        .gart_tlb_flush = &r600_pcie_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_test = &r600_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &r600_ring_ib_execute,
                        .emit_fence = &r600_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &r600_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                }
        },
        .irq = {
@@ -1004,13 +1017,14 @@ static struct radeon_asic evergreen_asic = {
        .vga_set_state = &r600_vga_set_state,
        .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_test = &r600_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &evergreen_ring_ib_execute,
                        .emit_fence = &r600_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &evergreen_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                }
        },
        .irq = {
@@ -1070,13 +1084,14 @@ static struct radeon_asic sumo_asic = {
        .vga_set_state = &r600_vga_set_state,
        .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_test = &r600_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &evergreen_ring_ib_execute,
                        .emit_fence = &r600_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &evergreen_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                },
        },
        .irq = {
@@ -1136,13 +1151,14 @@ static struct radeon_asic btc_asic = {
        .vga_set_state = &r600_vga_set_state,
        .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_test = &r600_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &evergreen_ring_ib_execute,
                        .emit_fence = &r600_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &evergreen_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                }
        },
        .irq = {
@@ -1212,7 +1228,6 @@ static struct radeon_asic cayman_asic = {
        .vga_set_state = &r600_vga_set_state,
        .gart_tlb_flush = &cayman_pcie_gart_tlb_flush,
        .gart_set_page = &rs600_gart_set_page,
-       .ring_test = &r600_ring_test,
        .ring = {
                [RADEON_RING_TYPE_GFX_INDEX] = {
                        .ib_execute = &cayman_ring_ib_execute,
@@ -1220,6 +1235,8 @@ static struct radeon_asic cayman_asic = {
                        .emit_fence = &cayman_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &evergreen_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                },
                [CAYMAN_RING_TYPE_CP1_INDEX] = {
                        .ib_execute = &cayman_ring_ib_execute,
@@ -1227,6 +1244,8 @@ static struct radeon_asic cayman_asic = {
                        .emit_fence = &cayman_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &evergreen_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                },
                [CAYMAN_RING_TYPE_CP2_INDEX] = {
                        .ib_execute = &cayman_ring_ib_execute,
@@ -1234,6 +1253,8 @@ static struct radeon_asic cayman_asic = {
                        .emit_fence = &cayman_fence_ring_emit,
                        .emit_semaphore = &r600_semaphore_ring_emit,
                        .cs_parse = &evergreen_cs_parse,
+                       .ring_test = &r600_ring_test,
+                       .ib_test = &r600_ib_test,
                }
        },
        .irq = {
index fd8d5dabdb6c8cf13435fe9ca4d101eee68622ad..b8f0a16bf65f0d6af6d613516069c11817f8d45c 100644 (file)
@@ -63,7 +63,7 @@ int r100_asic_reset(struct radeon_device *rdev);
 u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
 void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
 int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
-void r100_ring_start(struct radeon_device *rdev);
+void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
 int r100_irq_set(struct radeon_device *rdev);
 int r100_irq_process(struct radeon_device *rdev);
 void r100_fence_ring_emit(struct radeon_device *rdev,
@@ -109,7 +109,7 @@ bool r100_gpu_cp_is_lockup(struct radeon_device *rdev,
                           struct r100_gpu_lockup *lockup,
                           struct radeon_ring *cp);
 void r100_ib_fini(struct radeon_device *rdev);
-int r100_ib_test(struct radeon_device *rdev);
+int r100_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
 void r100_irq_disable(struct radeon_device *rdev);
 void r100_mc_stop(struct radeon_device *rdev, struct r100_mc_save *save);
 void r100_mc_resume(struct radeon_device *rdev, struct r100_mc_save *save);
@@ -161,7 +161,7 @@ extern int r300_suspend(struct radeon_device *rdev);
 extern int r300_resume(struct radeon_device *rdev);
 extern bool r300_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
 extern int r300_asic_reset(struct radeon_device *rdev);
-extern void r300_ring_start(struct radeon_device *rdev);
+extern void r300_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
 extern void r300_fence_ring_emit(struct radeon_device *rdev,
                                struct radeon_fence *fence);
 extern int r300_cs_parse(struct radeon_cs_parser *p);
@@ -273,7 +273,7 @@ int rv515_init(struct radeon_device *rdev);
 void rv515_fini(struct radeon_device *rdev);
 uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg);
 void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
-void rv515_ring_start(struct radeon_device *rdev);
+void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
 void rv515_bandwidth_update(struct radeon_device *rdev);
 int rv515_resume(struct radeon_device *rdev);
 int rv515_suspend(struct radeon_device *rdev);
@@ -319,7 +319,7 @@ int r600_set_surface_reg(struct radeon_device *rdev, int reg,
                         uint32_t tiling_flags, uint32_t pitch,
                         uint32_t offset, uint32_t obj_size);
 void r600_clear_surface_reg(struct radeon_device *rdev, int reg);
-int r600_ib_test(struct radeon_device *rdev, int ring);
+int r600_ib_test(struct radeon_device *rdev, struct radeon_ring *ring);
 void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
 int r600_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
 int r600_copy_blit(struct radeon_device *rdev,
index b0ce84a20a68faf628ea3b72171a41b38e78dfaf..5280c87d595549f4a1a9435e01a8af2d43325920 100644 (file)
@@ -430,7 +430,7 @@ static int rs400_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index fdb56b44dcd08b7f477823099b2a275a07390c7d..b07d297b0b4ffba5eee34d5bb20811388f6f515b 100644 (file)
@@ -885,7 +885,7 @@ static int rs600_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 29fc8b1506a48172043f0dc6879da57e5b8db6e1..6aa65032d3cb8ebfeab6dc0990f2e8b18b719edc 100644 (file)
@@ -647,7 +647,7 @@ static int rs690_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index 880637fd1946c5b7f717487fca8dad37eddb0b42..9e1b159bbb7fc1176771ba4847797fc54b5133ba 100644 (file)
@@ -53,9 +53,8 @@ void rv515_debugfs(struct radeon_device *rdev)
        }
 }
 
-void rv515_ring_start(struct radeon_device *rdev)
+void rv515_ring_start(struct radeon_device *rdev, struct radeon_ring *ring)
 {
-       struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
        int r;
 
        r = radeon_ring_lock(rdev, ring, 64);
@@ -413,7 +412,7 @@ static int rv515_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r100_ib_test(rdev);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "failed testing IB (%d).\n", r);
                rdev->accel_working = false;
index a86698137df434bdc658dd7fe75135de5aed6b43..6f2cbfb1829262e5079c73e1028b1b69324ee481 100644 (file)
@@ -1114,7 +1114,7 @@ static int rv770_startup(struct radeon_device *rdev)
        if (r)
                return r;
 
-       r = r600_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX);
+       r = radeon_ib_test(rdev, RADEON_RING_TYPE_GFX_INDEX, &rdev->ring[RADEON_RING_TYPE_GFX_INDEX]);
        if (r) {
                dev_err(rdev->dev, "IB test failed (%d).\n", r);
                rdev->accel_working = false;