#define __ASM_MACH_APIC_H
#define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
-#define esr_disable (1)
static inline int bigsmp_apic_id_registered(void)
{
#include <linux/gfp.h>
#define xapic_phys_to_log_apicid(cpu) per_cpu(x86_bios_cpu_apicid, cpu)
-#define esr_disable (1)
static inline int es7000_apic_id_registered(void)
{
}
#define NO_BALANCE_IRQ (0)
-#define esr_disable (0)
#ifdef CONFIG_X86_64
#include <asm/genapic.h>
#include <asm/genapic.h>
-#define esr_disable (apic->ESR_DISABLE)
#define NO_BALANCE_IRQ (apic->no_balance_irq)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL (apic->apic_destination_logical)
}
#define NO_BALANCE_IRQ (1)
-#define esr_disable (1)
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
#include <asm/smp.h>
#include <linux/gfp.h>
-#define esr_disable (1)
#define NO_BALANCE_IRQ (0)
/* In clustered mode, the high nibble of APIC ID is a cluster number.
return;
}
- if (esr_disable) {
+ if (apic->ESR_DISABLE) {
/*
* Something untraceable is creating bad interrupts on
* secondary quads ... for the moment, just leave the
#ifdef CONFIG_X86_32
/* Pound the ESR really hard over the head with a big hammer - mbligh */
- if (lapic_is_integrated() && esr_disable) {
+ if (lapic_is_integrated() && apic->ESR_DISABLE) {
apic_write(APIC_ESR, 0);
apic_write(APIC_ESR, 0);
apic_write(APIC_ESR, 0);
.irq_dest_mode = 0,
.target_cpus = bigsmp_target_cpus,
- .ESR_DISABLE = esr_disable,
+ .ESR_DISABLE = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
.irq_dest_mode = 1,
.target_cpus = default_target_cpus,
- .ESR_DISABLE = esr_disable,
+ .ESR_DISABLE = 0,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
.irq_dest_mode = 0,
.target_cpus = es7000_target_cpus,
- .ESR_DISABLE = esr_disable,
+ .ESR_DISABLE = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
.irq_dest_mode = 0,
.target_cpus = numaq_target_cpus,
- .ESR_DISABLE = esr_disable,
+ .ESR_DISABLE = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,
.irq_dest_mode = 1,
.target_cpus = summit_target_cpus,
- .ESR_DISABLE = esr_disable,
+ .ESR_DISABLE = 1,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
.check_apicid_present = check_apicid_present,