Drivers: ccree: cc_regs.h - align block comments
authorDerek Robson <robsonde@gmail.com>
Tue, 30 May 2017 06:16:55 +0000 (18:16 +1200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 3 Jun 2017 08:53:18 +0000 (17:53 +0900)
Fixed block comment alignment, Style fix only
Found using checkpatch

Signed-off-by: Derek Robson <robsonde@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/ccree/cc_regs.h

index e272da44783ea16a90869dc75bc08485983347b9..151341200d6a1c83c53b9710812331f36ebcdbfe 100644 (file)
@@ -56,8 +56,9 @@ do {                                                                      \
        BITFIELD_GET(reg_val, CC_ ## reg_name ## _ ## fld_name ## _BIT_SHIFT, \
                     CC_ ## reg_name ## _ ## fld_name ## _BIT_SIZE))
 
-/* yael TBD !!! -                                            *
-* all HW includes should start with CC_ and not DX_ !!       */
+/* yael TBD !!!
+ * all HW includes should start with CC_ and not DX_ !!
+ */
 
 
 /*! Bit fields set */
@@ -87,10 +88,10 @@ do {                                                                     \
 } while (0)
 
 /* Usage example:
  u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
  CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
  CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
  WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
* u32 reg_shadow = READ_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL));
* CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY0,reg_shadow, 3);
* CC_REG_FLD_SET(CRY_KERNEL,AES_CONTROL,NK_KEY1,reg_shadow, 1);
* WRITE_REGISTER(CC_REG_ADDR(CRY_KERNEL,AES_CONTROL), reg_shadow);
  */
 
 #endif /*_CC_REGS_H_*/