ASoC: da7218: Correct BCLK inversion for DSP DAI format mode
authorAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
Tue, 5 Jan 2016 18:15:33 +0000 (18:15 +0000)
committerMark Brown <broonie@kernel.org>
Tue, 5 Jan 2016 18:27:13 +0000 (18:27 +0000)
By default the device latches data on the falling edge of the
BCLK in DSP mode, whereas the expectation for normal BCLK is to
latch on the rising edge. This updates the driver to invert the
BCLK configuration for DSP mode, to align with expected behaviour.

Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/da7218.c

index 72686517ff54f2a98f4e039f42f29a2bfba930d9..93575f25186687f7fe21f5c6d514165c6cd27140 100644 (file)
@@ -1954,17 +1954,44 @@ static int da7218_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
                return -EINVAL;
        }
 
-       switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
-       case SND_SOC_DAIFMT_NB_NF:
-               break;
-       case SND_SOC_DAIFMT_NB_IF:
-               dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
-               break;
-       case SND_SOC_DAIFMT_IB_NF:
-               dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
+       switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
+       case SND_SOC_DAIFMT_I2S:
+       case SND_SOC_DAIFMT_LEFT_J:
+       case SND_SOC_DAIFMT_RIGHT_J:
+               switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+               case SND_SOC_DAIFMT_NB_NF:
+                       break;
+               case SND_SOC_DAIFMT_NB_IF:
+                       dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
+                       break;
+               case SND_SOC_DAIFMT_IB_NF:
+                       dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
+                       break;
+               case SND_SOC_DAIFMT_IB_IF:
+                       dai_clk_mode |= DA7218_DAI_WCLK_POL_INV |
+                                       DA7218_DAI_CLK_POL_INV;
+                       break;
+               default:
+                       return -EINVAL;
+               }
                break;
-       case SND_SOC_DAIFMT_IB_IF:
-               dai_clk_mode |= DA7218_DAI_WCLK_POL_INV | DA7218_DAI_CLK_POL_INV;
+       case SND_SOC_DAIFMT_DSP_B:
+               switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
+               case SND_SOC_DAIFMT_NB_NF:
+                       dai_clk_mode |= DA7218_DAI_CLK_POL_INV;
+                       break;
+               case SND_SOC_DAIFMT_NB_IF:
+                       dai_clk_mode |= DA7218_DAI_WCLK_POL_INV |
+                                       DA7218_DAI_CLK_POL_INV;
+                       break;
+               case SND_SOC_DAIFMT_IB_NF:
+                       break;
+               case SND_SOC_DAIFMT_IB_IF:
+                       dai_clk_mode |= DA7218_DAI_WCLK_POL_INV;
+                       break;
+               default:
+                       return -EINVAL;
+               }
                break;
        default:
                return -EINVAL;