Merge branch 'clk-iproc' into clk-next

* clk-iproc:
  clk: iproc: define Broadcom NS2 iProc clock binding
  clk: iproc: define Broadcom NSP iProc clock binding
  clk: ns2: add clock support for Broadcom Northstar 2 SoC
  clk: iproc: Separate status and control variables
  clk: iproc: Split off dig_filter
  clk: iproc: Add PLL base write function
  clk: nsp: add clock support for Broadcom Northstar Plus SoC
  clk: iproc: Add PWRCTRL support
  clk: cygnus: Convert all macros to all caps
  ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled

diff --cc drivers/clk/Makefile
Simple merge

diff --cc drivers/clk/bcm/Kconfig
Simple merge

diff --cc drivers/clk/bcm/Makefile
index ee2349bbe1f16855a3a0b2d4161d719aaacbc22c,2d1cbc5aac4184f31df687796b0104c12be3f7a9..3fc95060d875e8607696c61bece2020613f4fdb1
--- 1/drivers/clk/bcm/Makefile
--- 2/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@@ -3,5 -3,7 +3,8 @@@ obj-$(CONFIG_CLK_BCM_KONA)       += clk-kona-
  obj-$(CONFIG_CLK_BCM_KONA)    += clk-bcm281xx.o
  obj-$(CONFIG_CLK_BCM_KONA)    += clk-bcm21664.o
  obj-$(CONFIG_COMMON_CLK_IPROC)        += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
 +obj-$(CONFIG_ARCH_BCM2835)    += clk-bcm2835.o
+ obj-$(CONFIG_COMMON_CLK_IPROC)        += clk-ns2.o
  obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o
+ obj-$(CONFIG_ARCH_BCM_NSP)    += clk-nsp.o
+ obj-$(CONFIG_ARCH_BCM_5301X)  += clk-nsp.o

diff --cc drivers/clk/bcm/clk-iproc-pll.c
index d679ab86965327472913d1ba7a6c869ed1ec8676,7f7da79f4adc956833d678667a606d746a72b6cb..afd5891ac9e6aafeb6f429e487d5e06cbfd2f4f1
--- 1/drivers/clk/bcm/clk-iproc-pll.c
--- 2/drivers/clk/bcm/clk-iproc-pll.c
+++ b/drivers/clk/bcm/clk-iproc-pll.c
@@@ -363,22 -384,25 +384,22 @@@ static unsigned long iproc_pll_recalc_r
         *
         * ((ndiv_int + ndiv_frac / 2^20) * (parent clock rate / pdiv)
         */
-       val = readl(pll->pll_base + ctrl->ndiv_int.offset);
+       val = readl(pll->control_base + ctrl->ndiv_int.offset);
        ndiv_int = (val >> ctrl->ndiv_int.shift) &
                bit_mask(ctrl->ndiv_int.width);
 -      ndiv = (u64)ndiv_int << ctrl->ndiv_int.shift;
 +      ndiv = ndiv_int << 20;
  
        if (ctrl->flags & IPROC_CLK_PLL_HAS_NDIV_FRAC) {
-               val = readl(pll->pll_base + ctrl->ndiv_frac.offset);
+               val = readl(pll->control_base + ctrl->ndiv_frac.offset);
                ndiv_frac = (val >> ctrl->ndiv_frac.shift) &
                        bit_mask(ctrl->ndiv_frac.width);
 -
 -              if (ndiv_frac != 0)
 -                      ndiv = ((u64)ndiv_int << ctrl->ndiv_int.shift) |
 -                              ndiv_frac;
 +              ndiv += ndiv_frac;
        }
  
-       val = readl(pll->pll_base + ctrl->pdiv.offset);
+       val = readl(pll->control_base + ctrl->pdiv.offset);
        pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width);
  
 -      clk->rate = (ndiv * parent_rate) >> ctrl->ndiv_int.shift;
 +      clk->rate = (ndiv * parent_rate) >> 20;
  
        if (pdiv == 0)
                clk->rate *= 2;