drm/i915: Let's hope future platforms will use the same WM code as SKL
authorDamien Lespiau <damien.lespiau@intel.com>
Thu, 13 Nov 2014 17:51:52 +0000 (17:51 +0000)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Nov 2014 10:29:47 +0000 (11:29 +0100)
Given the history, there's some chance we'll keep the same WM code for a
bit (previously, we were able to reuse the same WM code from ILK to BDW,
so that sounds like a fair assumption).

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c

index 0c705d9ba8be3f8d0b69aaa359a3b92859cac383..87bff1652cb0bb707703e1af886003fd7cc2b0eb 100644 (file)
@@ -7067,7 +7067,7 @@ void intel_init_pm(struct drm_device *dev)
                i915_ironlake_get_mem_freq(dev);
 
        /* For FIFO watermark updates */
-       if (IS_GEN9(dev)) {
+       if (INTEL_INFO(dev)->gen >= 9) {
                skl_setup_wm_latency(dev);
 
                dev_priv->display.init_clock_gating = gen9_init_clock_gating;