clk: renesas: r8a7795: Add HS-USB ch3 clock

This patch adds valid HS-USB ch3 clock from R8A7795 ES2.0 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 58dd5b6bef0d0531ba637cb05dfa5a6b87b99eee..5808803cec487774af7735c1a9b95a6f921f3e4e 100644 (file)
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -196,6 +196,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("ehci1",                 702,   R8A7795_CLK_S3D4),
        DEF_MOD("ehci0",                 703,   R8A7795_CLK_S3D4),
        DEF_MOD("hsusb",                 704,   R8A7795_CLK_S3D4),
+       DEF_MOD("hsusb3",                705,   R8A7795_CLK_S3D4),
        DEF_MOD("csi21",                 713,   R8A7795_CLK_CSI0), /* ES1.x */
        DEF_MOD("csi20",                 714,   R8A7795_CLK_CSI0),
        DEF_MOD("csi41",                 715,   R8A7795_CLK_CSI0),