mmc: dw_mmc: exynos: fix the finding clock sample value

commit 697542bceae51f7620af333b065dd09d213629fb upstream.

Even though there are candiates value if can't find best value, it's
returned -EIO. It's not proper behavior.
If there is not best value, use a first candiate value to work eMMC.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Cc: stable@vger.kernel.org
Fixes: c537a1c5ff63 ("mmc: dw_mmc: exynos: add variable delay tuning sequence")
Link: https://lore.kernel.org/r/20211022082106.1557-1-jh80.chung@samsung.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c
index a84aa3f1ae8547c4cdbf24cb05ef7e32dca8d94a..ae0357481041bbabf2e7b358274edaf6007f34f7 100644 (file)
--- a/drivers/mmc/host/dw_mmc-exynos.c
+++ b/drivers/mmc/host/dw_mmc-exynos.c
@@ -437,6 +437,18 @@ static s8 dw_mci_exynos_get_best_clksmpl(u8 candiates)
                }
        }
 
+       /*
+        * If there is no cadiates value, then it needs to return -EIO.
+        * If there are candiates values and don't find bset clk sample value,
+        * then use a first candiates clock sample value.
+        */
+       for (i = 0; i < iter; i++) {
+               __c = ror8(candiates, i);
+               if ((__c & 0x1) == 0x1) {
+                       loc = i;
+                       goto out;
+               }
+       }
 out:
        return loc;
 }
@@ -467,6 +479,8 @@ static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
                priv->tuned_sample = found;
        } else {
                ret = -EIO;
+               dev_warn(&mmc->class_dev,
+                       "There is no candiates value about clksmpl!\n");
        }
 
        return ret;