atl1c: enlarge L1 response waiting timer
authorHuang, Xiong <xiong@qca.qualcomm.com>
Mon, 30 Apr 2012 15:38:54 +0000 (15:38 +0000)
committerDavid S. Miller <davem@davemloft.net>
Tue, 1 May 2012 01:44:14 +0000 (21:44 -0400)
The hardware incorrectly process L0S/L1 entrance if the chipset/root
response after specific/shorter timer and cause system hang.
Enlarge the timeout value to avoid this issue.

Signed-off-by: xiong <xiong@qca.qualcomm.com>
Tested-by: Liu David <dwliu@qca.qualcomm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/atheros/atl1c/atl1c_hw.h

index 21a5bc1dc1f2a3111c2bf908d0abbd540c1950c5..17d935bdde0ad5a7043393b2bb9f9559351e36b3 100644 (file)
@@ -157,7 +157,7 @@ void atl1c_post_phy_linkchg(struct atl1c_hw *hw, u16 link_speed);
 #define PM_CTRL_PM_REQ_TIMER_MASK      0xFUL
 #define PM_CTRL_PM_REQ_TIMER_SHIFT     20      /* pm_request_l1 time > @
                                                 * ->L0s not L1 */
-#define PM_CTRL_PM_REQ_TO_DEF          0xC
+#define PM_CTRL_PM_REQ_TO_DEF          0xF
 #define PMCTRL_TXL1_AFTER_L0S          BIT(19) /* l1dv2.0+ */
 #define L1D_PMCTRL_L1_ENTRY_TM_MASK    7UL     /* l1dv2.0+, 3bits */
 #define L1D_PMCTRL_L1_ENTRY_TM_SHIFT   16