if ((info == NULL) || (info->name == NULL))
return -1;
- pr_info(SYS "get current mode: %s\n",
- info ? info->name : "null");
+ pr_info(SYS "get current mode: %s\n", info->name);
if (!((strncmp(info->name, "480cvbs", 7) == 0) ||
(strncmp(info->name, "576cvbs", 7) == 0) ||
hdev->para = hdmi_get_fmt_name("invalid", hdev->fmt_attr);
return -1;
}
- memcpy(mode, info->name, strlen(info->name));
+ memcpy(mode, info->name, sizeof(mode));
if (strstr(mode, "fp")) {
int i = 0;
VEN_DB1[4] = 0x2;
else if (vic == HDMI_3840x2160p24_16x9)
VEN_DB1[4] = 0x3;
- else if (vic == HDMI_4096x2160p24_256x135)
+ else/*vic == HDMI_4096x2160p24_256x135*/
VEN_DB1[4] = 0x4;
- else
- VEN_DB1[4] = 0x0;
}
if (type == EOTF_T_DOLBYVISION) {
hdev->HWOp.SetPacket(HDMI_PACKET_VEND, VEN_DB1, VEN_HB);
} else {
for (i = 0; disp_mode_t[i]; i++) {
memset(mode_tmp, 0, sizeof(mode_tmp));
- strncpy(mode_tmp, disp_mode_t[i], sizeof(mode_tmp));
+ strncpy(mode_tmp, disp_mode_t[i], 31);
vic = hdmitx_edid_get_VIC(&hdmitx_device, mode_tmp, 0);
/* Handling only 4k420 mode */
if (vic == HDMI_Unknown) {
}
next: /* Detect RX support HDCP14 */
/* Here, must assume RX support HDCP14, otherwise affect 1A-03 */
- if (ver == 0U) {
- pos += snprintf(buf+pos, PAGE_SIZE, "14\n\r");
- return pos;
- }
+ pos += snprintf(buf+pos, PAGE_SIZE, "14\n\r");
return pos;
+
}
static ssize_t show_hpd_state(struct device *dev,
hdmitx_device.config_data.vend_data = kzalloc(
sizeof(struct vendor_info_data), GFP_KERNEL);
if (!hdmitx_device.config_data.vend_data)
- ret = -ENOMEM;
+ pr_info(SYS "not allocate memory\n");
ret = get_dt_vend_init_data(init_data,
hdmitx_device.config_data.vend_data);
if (ret)
hdev->ready = 1;
/* Get uboot output color space from AVI */
switch (hdmitx_rd_reg(HDMITX_DWC_FC_AVICONF0) & 0x3) {
- case 0:
- hdev->para->cs = COLORSPACE_RGB444;
- break;
case 1:
hdev->para->cs = COLORSPACE_YUV422;
break;
hdev->para->cs = COLORSPACE_YUV420;
break;
default:
+ hdev->para->cs = COLORSPACE_RGB444;
break;
}
/* If color space is not 422, then get depth from VP_PR_CD */
break;
case CONF_EMP_NUMBER:
hdmitx_set_reg_bits(HDMITX_TOP_EMP_CNTL0, argv, 16, 16);
+ break;
case CONF_EMP_PHY_ADDR:
hdmitx_rd_check_reg(HDMITX_TOP_EMP_STAT0, 0, 0x3fffffff);
hdmitx_wr_reg(HDMITX_TOP_EMP_MEMADDR_START, argv);/*phys_ptr*/
hdmitx_set_reg_bits(HDMITX_TOP_EMP_CNTL1, 1, 17, 1); /*little*/
hdmitx_set_reg_bits(HDMITX_TOP_EMP_CNTL1, 120, 0, 16);
hdmitx_set_reg_bits(HDMITX_TOP_EMP_CNTL0, 1, 0, 1);/*emp_tx_en*/
+ break;
default:
break;
}