add mali_page_fault and pp_hardware_reset for mp

Change-Id: I0ff2e6ace0bb9b435730b1c7fe80d8864cf2a013
Signed-off-by: Jiyu Yang <jiyu.yang@amlogic.com>

diff --git a/mali/common/mali_mmu.c b/mali/common/mali_mmu.c
index b975c1468d6783c5ec310d2a61572755c42cc9a6..fac1f7cb7a52f8e918ab1a10b17a4fb058b12ce0 100755 (executable)
--- a/mali/common/mali_mmu.c
+++ b/mali/common/mali_mmu.c
@@ -395,6 +395,7 @@ static void mali_mmu_probe_trigger(void *data)
 }
 
 /* Is called when the irq probe wants the mmu to acknowledge an interrupt from the hw */
+extern int mali_page_fault;
 static _mali_osk_errcode_t mali_mmu_probe_ack(void *data)
 {
        struct mali_mmu_core *mmu = (struct mali_mmu_core *)data;
@@ -408,6 +409,7 @@ static _mali_osk_errcode_t mali_mmu_probe_ack(void *data)
                mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_CLEAR, MALI_MMU_INTERRUPT_PAGE_FAULT);
        } else {
                MALI_DEBUG_PRINT(1, ("Probe: Page fault detect: FAILED\n"));
+               mali_page_fault++;
        }
 
        if (int_stat & MALI_MMU_INTERRUPT_READ_BUS_ERROR) {
@@ -415,6 +417,7 @@ static _mali_osk_errcode_t mali_mmu_probe_ack(void *data)
                mali_hw_core_register_write(&mmu->hw_core, MALI_MMU_REGISTER_INT_CLEAR, MALI_MMU_INTERRUPT_READ_BUS_ERROR);
        } else {
                MALI_DEBUG_PRINT(1, ("Probe: Bus read error detect: FAILED\n"));
+               mali_page_fault++;
        }
 
        if ((int_stat & (MALI_MMU_INTERRUPT_PAGE_FAULT | MALI_MMU_INTERRUPT_READ_BUS_ERROR)) ==

diff --git a/mali/common/mali_pp.c b/mali/common/mali_pp.c
index 413ee4834e275d38de911b594d2206d9975bef5a..b1fcdeab571857c5860f13b8c2e16df6c4c874f3 100755 (executable)
--- a/mali/common/mali_pp.c
+++ b/mali/common/mali_pp.c
@@ -203,6 +203,7 @@ static const u32 mali_wb_registers_reset_values[_MALI_PP_MAX_WB_REGISTERS] = {
 /* Performance Counter 0 Enable Register reset value */
 static const u32 mali_perf_cnt_enable_reset_value = 0;
 
+extern int pp_hardware_reset;
 _mali_osk_errcode_t mali_pp_hard_reset(struct mali_pp_core *core)
 {
        /* Bus must be stopped before calling this function */
@@ -212,6 +213,7 @@ _mali_osk_errcode_t mali_pp_hard_reset(struct mali_pp_core *core)
 
        MALI_DEBUG_ASSERT_POINTER(core);
        MALI_DEBUG_PRINT(2, ("Mali PP: Hard reset of core %s\n", core->hw_core.description));
+       pp_hardware_reset ++;
 
        /* Set register to a bogus value. The register will be used to detect when reset is complete */
        mali_hw_core_register_write_relaxed(&core->hw_core, MALI200_REG_ADDR_MGMT_WRITE_BOUNDARY_LOW, reset_invalid_value);

diff --git a/mali/linux/mali_kernel_linux.c b/mali/linux/mali_kernel_linux.c
index a0dcc367fbda969f4a1c70ed27232d73c01642b7..874da42810aebcdd3dfb59bf21b3b9f2ce9a0de4 100755 (executable)
--- a/mali/linux/mali_kernel_linux.c
+++ b/mali/linux/mali_kernel_linux.c
@@ -68,6 +68,13 @@ extern int mali_pdev_dts_init(struct platform_device* mali_gpu_device);
 extern int mpgpu_class_init(void);
 extern void mpgpu_class_exit(void);
 
+int mali_page_fault = 0;
+module_param(mali_page_fault, int, S_IRUSR | S_IWUSR | S_IWGRP | S_IRGRP | S_IROTH); /* rw-rw-r-- */
+MODULE_PARM_DESC(mali_page_fault, "mali_page_fault");
+
+int pp_hardware_reset = 0;
+module_param(pp_hardware_reset, int, S_IRUSR | S_IWUSR | S_IWGRP | S_IRGRP | S_IROTH); /* rw-rw-r-- */
+MODULE_PARM_DESC(pp_hardware_reset, "mali_hardware_reset");
 /* Module parameter to control log level */
 int mali_debug_level = 2;
 module_param(mali_debug_level, int, S_IRUSR | S_IWUSR | S_IWGRP | S_IRGRP | S_IROTH); /* rw-rw-r-- */