ath10k: add firmware crash counters
authorBen Greear <greearb@candelatech.com>
Mon, 29 Sep 2014 11:41:46 +0000 (14:41 +0300)
committerKalle Valo <kvalo@qca.qualcomm.com>
Wed, 1 Oct 2014 08:16:27 +0000 (11:16 +0300)
Add three counters related to firmware crashes or resets.

Usage:

# cat /sys/kernel/debug/ieee80211/phy0/ath10k/fw_reset_stats
fw_crash_counter                2
fw_warm_reset_counter           43
fw_cold_reset_counter           0
#

kvalo: split into it's own patch, add debugfs file and add locking

Signed-off-by: Ben Greear <greearb@candelatech.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath10k/core.h
drivers/net/wireless/ath/ath10k/debug.c
drivers/net/wireless/ath/ath10k/pci.c

index 674e38c219e66dae5876cf081130ed9b80a7d135..5a1dc98375e11cc41414b08adaee6b904dc922a6 100644 (file)
@@ -563,6 +563,13 @@ struct ath10k {
                bool utf_monitor;
        } testmode;
 
+       struct {
+               /* protected by data_lock */
+               u32 fw_crash_counter;
+               u32 fw_warm_reset_counter;
+               u32 fw_cold_reset_counter;
+       } stats;
+
        /* must be last */
        u8 drv_priv[0] __aligned(sizeof(void *));
 };
index 680d5088b6f3e34689720b1d8d5193b1365d9e43..8d3db1c3f4a82669cbb0539dccbc70c9954850df 100644 (file)
@@ -625,6 +625,47 @@ static const struct file_operations fops_fw_stats = {
        .llseek = default_llseek,
 };
 
+static ssize_t ath10k_debug_fw_reset_stats_read(struct file *file,
+                                               char __user *user_buf,
+                                               size_t count, loff_t *ppos)
+{
+       struct ath10k *ar = file->private_data;
+       int ret, len, buf_len;
+       char *buf;
+
+       buf_len = 500;
+       buf = kmalloc(buf_len, GFP_KERNEL);
+       if (!buf)
+               return -ENOMEM;
+
+       spin_lock_bh(&ar->data_lock);
+
+       len = 0;
+       len += scnprintf(buf + len, buf_len - len,
+                        "fw_crash_counter\t\t%d\n", ar->stats.fw_crash_counter);
+       len += scnprintf(buf + len, buf_len - len,
+                        "fw_warm_reset_counter\t\t%d\n",
+                        ar->stats.fw_warm_reset_counter);
+       len += scnprintf(buf + len, buf_len - len,
+                        "fw_cold_reset_counter\t\t%d\n",
+                        ar->stats.fw_cold_reset_counter);
+
+       spin_unlock_bh(&ar->data_lock);
+
+       ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
+
+       kfree(buf);
+
+       return ret;
+}
+
+static const struct file_operations fops_fw_reset_stats = {
+       .open = simple_open,
+       .read = ath10k_debug_fw_reset_stats_read,
+       .owner = THIS_MODULE,
+       .llseek = default_llseek,
+};
+
 /* This is a clean assert crash in firmware. */
 static int ath10k_debug_fw_assert(struct ath10k *ar)
 {
@@ -1331,6 +1372,9 @@ int ath10k_debug_register(struct ath10k *ar)
        debugfs_create_file("fw_stats", S_IRUSR, ar->debug.debugfs_phy, ar,
                            &fops_fw_stats);
 
+       debugfs_create_file("fw_reset_stats", S_IRUSR, ar->debug.debugfs_phy,
+                           ar, &fops_fw_reset_stats);
+
        debugfs_create_file("wmi_services", S_IRUSR, ar->debug.debugfs_phy, ar,
                            &fops_wmi_services);
 
index ae961c6ff74e11f67fda81e425c008efbde91e2f..8a04904ccceeedec3c7a72b10e3aa8a5e5b831e9 100644 (file)
@@ -1006,6 +1006,8 @@ static void ath10k_pci_fw_crashed_dump(struct ath10k *ar)
 
        spin_lock_bh(&ar->data_lock);
 
+       ar->stats.fw_crash_counter++;
+
        crash_data = ath10k_debug_get_new_fw_crash_data(ar);
 
        if (crash_data)
@@ -1692,6 +1694,12 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
 
        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset\n");
 
+       spin_lock_bh(&ar->data_lock);
+
+       ar->stats.fw_warm_reset_counter++;
+
+       spin_unlock_bh(&ar->data_lock);
+
        /* debug */
        val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
                                PCIE_INTR_CAUSE_ADDRESS);
@@ -2308,6 +2316,12 @@ static int ath10k_pci_cold_reset(struct ath10k *ar)
 
        ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cold reset\n");
 
+       spin_lock_bh(&ar->data_lock);
+
+       ar->stats.fw_cold_reset_counter++;
+
+       spin_unlock_bh(&ar->data_lock);
+
        /* Put Target, including PCIe, into RESET. */
        val = ath10k_pci_reg_read32(ar, SOC_GLOBAL_RESET_ADDRESS);
        val |= 1;