e1000e: clearing interrupt timers causes descriptors to get flushed
authorBruce Allan <bruce.w.allan@intel.com>
Fri, 20 Nov 2009 23:22:39 +0000 (23:22 +0000)
committerDavid S. Miller <davem@davemloft.net>
Sat, 21 Nov 2009 19:33:46 +0000 (11:33 -0800)
Clearing the interrupt timers following an IMS clear has the unwanted
side-effect of flushing all descriptors immediately following a partial
write when interrupts are disabled.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/e1000e/netdev.c

index 3caa1d5893c42ef244134ecfe0bfbc6e9eb2515a..3845fb698b4d05f50834ec165e4f13c75e83f064 100644 (file)
@@ -2441,8 +2441,6 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)
                ew32(ITR, 1000000000 / (adapter->itr * 256));
 
        ctrl_ext = er32(CTRL_EXT);
-       /* Reset delay timers after every interrupt */
-       ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
        /* Auto-Mask interrupts upon ICR access */
        ctrl_ext |= E1000_CTRL_EXT_IAME;
        ew32(IAM, 0xffffffff);