Merge branch 'ep93xx-for-arm-soc' of git://github.com/RyanMallon/linux-2.6 into next...
authorArnd Bergmann <arnd@arndb.de>
Thu, 15 Mar 2012 15:19:05 +0000 (15:19 +0000)
committerArnd Bergmann <arnd@arndb.de>
Thu, 15 Mar 2012 15:20:07 +0000 (15:20 +0000)
* 'ep93xx-for-arm-soc' of git://github.com/RyanMallon/linux-2.6:
  ep93xx: Remove unnecessary includes of ep93xx-regs.h
  ep93xx: Move EP93XX_SYSCON defines to SoC private header
  ep93xx: Move crunch code to mach-ep93xx directory
  ep93xx: Make syscon access functions private to SoC
  ep93xx: Configure GPIO ports in core code
  ep93xx: Move peripheral defines to local SoC header
  ep93xx: Convert the watchdog driver into a platform device.
  ep93xx: Use ioremap for backlight driver
  ep93xx: Move GPIO defines to gpio-ep93xx.h
  ep93xx: Don't use system controller defines in audio drivers
  ep93xx: Move PHYS_BASE defines to local SoC header file

(update to v3.3-rc7)

Conflicts:
arch/arm/mach-s3c2440/common.h

16 files changed:
1  2 
arch/arm/Kconfig
arch/arm/mach-ep93xx/core.c
arch/arm/mach-exynos/mach-universal_c210.c
arch/arm/mach-s3c24xx/mach-anubis.c
arch/arm/mach-s3c24xx/mach-at2440evb.c
arch/arm/mach-s3c24xx/mach-gta02.c
arch/arm/mach-s3c24xx/mach-mini2440.c
arch/arm/mach-s3c24xx/mach-nexcoder.c
arch/arm/mach-s3c24xx/mach-osiris.c
arch/arm/mach-s3c24xx/mach-rx1950.c
arch/arm/mach-s3c24xx/mach-rx3715.c
arch/arm/mach-s3c24xx/mach-smdk2440.c
arch/arm/mach-s3c24xx/s3c2440.c
arch/arm/mach-s3c24xx/s3c244x.c
arch/arm/plat-samsung/devs.c
drivers/mmc/host/mmci.c

Simple merge
Simple merge
index 9e0f74515bb15814134dbaf973ab0e37848445a6,0000000000000000000000000000000000000000..60c72c54c21e2f7fe4d8fade9f698ecdf11930c5
mode 100644,000000..100644
--- /dev/null
@@@ -1,492 -1,0 +1,492 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-anubis.c
 + *
 + * Copyright 2003-2009 Simtec Electronics
 + *    http://armlinux.simtec.co.uk/
 + *    Ben Dooks <ben@simtec.co.uk>
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/gpio.h>
 +#include <linux/serial_core.h>
 +#include <linux/platform_device.h>
 +#include <linux/ata_platform.h>
 +#include <linux/i2c.h>
 +#include <linux/io.h>
 +#include <linux/sm501.h>
 +#include <linux/sm501-regs.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <mach/anubis-map.h>
 +#include <mach/anubis-irq.h>
 +#include <mach/anubis-cpld.h>
 +
 +#include <mach/hardware.h>
 +#include <asm/irq.h>
 +#include <asm/mach-types.h>
 +
 +#include <plat/regs-serial.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-mem.h>
 +#include <mach/regs-lcd.h>
 +#include <plat/nand.h>
 +#include <plat/iic.h>
 +
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/nand.h>
 +#include <linux/mtd/nand_ecc.h>
 +#include <linux/mtd/partitions.h>
 +
 +#include <net/ax88796.h>
 +
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +#include <plat/audio-simtec.h>
 +
 +#include "simtec.h"
 +#include "common.h"
 +
 +#define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
 +
 +static struct map_desc anubis_iodesc[] __initdata = {
 +  /* ISA IO areas */
 +
 +  {
 +      .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
 +      .pfn            = __phys_to_pfn(0x0),
 +      .length         = SZ_4M,
 +      .type           = MT_DEVICE,
 +  }, {
 +      .virtual        = (u32)S3C24XX_VA_ISA_WORD,
 +      .pfn            = __phys_to_pfn(0x0),
 +      .length         = SZ_4M,
 +      .type           = MT_DEVICE,
 +  },
 +
 +  /* we could possibly compress the next set down into a set of smaller tables
 +   * pagetables, but that would mean using an L2 section, and it still means
 +   * we cannot actually feed the same register to an LDR due to 16K spacing
 +   */
 +
 +  /* CPLD control registers */
 +
 +  {
 +      .virtual        = (u32)ANUBIS_VA_CTRL1,
 +      .pfn            = __phys_to_pfn(ANUBIS_PA_CTRL1),
 +      .length         = SZ_4K,
 +      .type           = MT_DEVICE,
 +  }, {
 +      .virtual        = (u32)ANUBIS_VA_IDREG,
 +      .pfn            = __phys_to_pfn(ANUBIS_PA_IDREG),
 +      .length         = SZ_4K,
 +      .type           = MT_DEVICE,
 +  },
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 +
 +static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
 +      [0] = {
 +              .hwport      = 0,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +              .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 +      },
 +      [1] = {
 +              .hwport      = 2,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +              .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 +      },
 +};
 +
 +/* NAND Flash on Anubis board */
 +
 +static int external_map[]   = { 2 };
 +static int chip0_map[]      = { 0 };
 +static int chip1_map[]      = { 1 };
 +
 +static struct mtd_partition __initdata anubis_default_nand_part[] = {
 +      [0] = {
 +              .name   = "Boot Agent",
 +              .size   = SZ_16K,
 +              .offset = 0,
 +      },
 +      [1] = {
 +              .name   = "/boot",
 +              .size   = SZ_4M - SZ_16K,
 +              .offset = SZ_16K,
 +      },
 +      [2] = {
 +              .name   = "user1",
 +              .offset = SZ_4M,
 +              .size   = SZ_32M - SZ_4M,
 +      },
 +      [3] = {
 +              .name   = "user2",
 +              .offset = SZ_32M,
 +              .size   = MTDPART_SIZ_FULL,
 +      }
 +};
 +
 +static struct mtd_partition __initdata anubis_default_nand_part_large[] = {
 +      [0] = {
 +              .name   = "Boot Agent",
 +              .size   = SZ_128K,
 +              .offset = 0,
 +      },
 +      [1] = {
 +              .name   = "/boot",
 +              .size   = SZ_4M - SZ_128K,
 +              .offset = SZ_128K,
 +      },
 +      [2] = {
 +              .name   = "user1",
 +              .offset = SZ_4M,
 +              .size   = SZ_32M - SZ_4M,
 +      },
 +      [3] = {
 +              .name   = "user2",
 +              .offset = SZ_32M,
 +              .size   = MTDPART_SIZ_FULL,
 +      }
 +};
 +
 +/* the Anubis has 3 selectable slots for nand-flash, the two
 + * on-board chip areas, as well as the external slot.
 + *
 + * Note, there is no current hot-plug support for the External
 + * socket.
 +*/
 +
 +static struct s3c2410_nand_set __initdata anubis_nand_sets[] = {
 +      [1] = {
 +              .name           = "External",
 +              .nr_chips       = 1,
 +              .nr_map         = external_map,
 +              .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 +              .partitions     = anubis_default_nand_part,
 +      },
 +      [0] = {
 +              .name           = "chip0",
 +              .nr_chips       = 1,
 +              .nr_map         = chip0_map,
 +              .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 +              .partitions     = anubis_default_nand_part,
 +      },
 +      [2] = {
 +              .name           = "chip1",
 +              .nr_chips       = 1,
 +              .nr_map         = chip1_map,
 +              .nr_partitions  = ARRAY_SIZE(anubis_default_nand_part),
 +              .partitions     = anubis_default_nand_part,
 +      },
 +};
 +
 +static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
 +{
 +      unsigned int tmp;
 +
 +      slot = set->nr_map[slot] & 3;
 +
 +      pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
 +               slot, set, set->nr_map);
 +
 +      tmp = __raw_readb(ANUBIS_VA_CTRL1);
 +      tmp &= ~ANUBIS_CTRL1_NANDSEL;
 +      tmp |= slot;
 +
 +      pr_debug("anubis_nand: ctrl1 now %02x\n", tmp);
 +
 +      __raw_writeb(tmp, ANUBIS_VA_CTRL1);
 +}
 +
 +static struct s3c2410_platform_nand __initdata anubis_nand_info = {
 +      .tacls          = 25,
 +      .twrph0         = 55,
 +      .twrph1         = 40,
 +      .nr_sets        = ARRAY_SIZE(anubis_nand_sets),
 +      .sets           = anubis_nand_sets,
 +      .select_chip    = anubis_nand_select,
 +};
 +
 +/* IDE channels */
 +
 +static struct pata_platform_info anubis_ide_platdata = {
 +      .ioport_shift   = 5,
 +};
 +
 +static struct resource anubis_ide0_resource[] = {
 +      {
 +              .start  = S3C2410_CS3,
 +              .end    = S3C2410_CS3 + (8*32) - 1,
 +              .flags  = IORESOURCE_MEM,
 +      }, {
 +              .start  = S3C2410_CS3 + (1<<26) + (6*32),
 +              .end    = S3C2410_CS3 + (1<<26) + (7*32) - 1,
 +              .flags  = IORESOURCE_MEM,
 +      }, {
 +              .start  = IRQ_IDE0,
 +              .end    = IRQ_IDE0,
 +              .flags  = IORESOURCE_IRQ,
 +      },
 +};
 +
 +static struct platform_device anubis_device_ide0 = {
 +      .name           = "pata_platform",
 +      .id             = 0,
 +      .num_resources  = ARRAY_SIZE(anubis_ide0_resource),
 +      .resource       = anubis_ide0_resource,
 +      .dev    = {
 +              .platform_data = &anubis_ide_platdata,
 +              .coherent_dma_mask = ~0,
 +      },
 +};
 +
 +static struct resource anubis_ide1_resource[] = {
 +      {
 +              .start  = S3C2410_CS4,
 +              .end    = S3C2410_CS4 + (8*32) - 1,
 +              .flags  = IORESOURCE_MEM,
 +      }, {
 +              .start  = S3C2410_CS4 + (1<<26) + (6*32),
 +              .end    = S3C2410_CS4 + (1<<26) + (7*32) - 1,
 +              .flags  = IORESOURCE_MEM,
 +      }, {
 +              .start  = IRQ_IDE0,
 +              .end    = IRQ_IDE0,
 +              .flags  = IORESOURCE_IRQ,
 +      },
 +};
 +
 +static struct platform_device anubis_device_ide1 = {
 +      .name           = "pata_platform",
 +      .id             = 1,
 +      .num_resources  = ARRAY_SIZE(anubis_ide1_resource),
 +      .resource       = anubis_ide1_resource,
 +      .dev    = {
 +              .platform_data = &anubis_ide_platdata,
 +              .coherent_dma_mask = ~0,
 +      },
 +};
 +
 +/* Asix AX88796 10/100 ethernet controller */
 +
 +static struct ax_plat_data anubis_asix_platdata = {
 +      .flags          = AXFLG_MAC_FROMDEV,
 +      .wordlength     = 2,
 +      .dcr_val        = 0x48,
 +      .rcr_val        = 0x40,
 +};
 +
 +static struct resource anubis_asix_resource[] = {
 +      [0] = {
 +              .start = S3C2410_CS5,
 +              .end   = S3C2410_CS5 + (0x20 * 0x20) -1,
 +              .flags = IORESOURCE_MEM
 +      },
 +      [1] = {
 +              .start = IRQ_ASIX,
 +              .end   = IRQ_ASIX,
 +              .flags = IORESOURCE_IRQ
 +      }
 +};
 +
 +static struct platform_device anubis_device_asix = {
 +      .name           = "ax88796",
 +      .id             = 0,
 +      .num_resources  = ARRAY_SIZE(anubis_asix_resource),
 +      .resource       = anubis_asix_resource,
 +      .dev            = {
 +              .platform_data = &anubis_asix_platdata,
 +      }
 +};
 +
 +/* SM501 */
 +
 +static struct resource anubis_sm501_resource[] = {
 +      [0] = {
 +              .start  = S3C2410_CS2,
 +              .end    = S3C2410_CS2 + SZ_8M,
 +              .flags  = IORESOURCE_MEM,
 +      },
 +      [1] = {
 +              .start  = S3C2410_CS2 + SZ_64M - SZ_2M,
 +              .end    = S3C2410_CS2 + SZ_64M - 1,
 +              .flags  = IORESOURCE_MEM,
 +      },
 +      [2] = {
 +              .start  = IRQ_EINT0,
 +              .end    = IRQ_EINT0,
 +              .flags  = IORESOURCE_IRQ,
 +      },
 +};
 +
 +static struct sm501_initdata anubis_sm501_initdata = {
 +      .gpio_high      = {
 +              .set    = 0x3F000000,           /* 24bit panel */
 +              .mask   = 0x0,
 +      },
 +      .misc_timing    = {
 +              .set    = 0x010100,             /* SDRAM timing */
 +              .mask   = 0x1F1F00,
 +      },
 +      .misc_control   = {
 +              .set    = SM501_MISC_PNL_24BIT,
 +              .mask   = 0,
 +      },
 +
 +      .devices        = SM501_USE_GPIO,
 +
 +      /* set the SDRAM and bus clocks */
 +      .mclk           = 72 * MHZ,
 +      .m1xclk         = 144 * MHZ,
 +};
 +
 +static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
 +      [0] = {
 +              .bus_num        = 1,
 +              .pin_scl        = 44,
 +              .pin_sda        = 45,
 +      },
 +      [1] = {
 +              .bus_num        = 2,
 +              .pin_scl        = 40,
 +              .pin_sda        = 41,
 +      },
 +};
 +
 +static struct sm501_platdata anubis_sm501_platdata = {
 +      .init           = &anubis_sm501_initdata,
 +      .gpio_base      = -1,
 +      .gpio_i2c       = anubis_sm501_gpio_i2c,
 +      .gpio_i2c_nr    = ARRAY_SIZE(anubis_sm501_gpio_i2c),
 +};
 +
 +static struct platform_device anubis_device_sm501 = {
 +      .name           = "sm501",
 +      .id             = 0,
 +      .num_resources  = ARRAY_SIZE(anubis_sm501_resource),
 +      .resource       = anubis_sm501_resource,
 +      .dev            = {
 +              .platform_data = &anubis_sm501_platdata,
 +      },
 +};
 +
 +/* Standard Anubis devices */
 +
 +static struct platform_device *anubis_devices[] __initdata = {
 +      &s3c_device_ohci,
 +      &s3c_device_wdt,
 +      &s3c_device_adc,
 +      &s3c_device_i2c0,
 +      &s3c_device_rtc,
 +      &s3c_device_nand,
 +      &anubis_device_ide0,
 +      &anubis_device_ide1,
 +      &anubis_device_asix,
 +      &anubis_device_sm501,
 +};
 +
 +static struct clk *anubis_clocks[] __initdata = {
 +      &s3c24xx_dclk0,
 +      &s3c24xx_dclk1,
 +      &s3c24xx_clkout0,
 +      &s3c24xx_clkout1,
 +      &s3c24xx_uclk,
 +};
 +
 +/* I2C devices. */
 +
 +static struct i2c_board_info anubis_i2c_devs[] __initdata = {
 +      {
 +              I2C_BOARD_INFO("tps65011", 0x48),
 +              .irq    = IRQ_EINT20,
 +      }
 +};
 +
 +/* Audio setup */
 +static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {
 +      .have_mic       = 1,
 +      .have_lout      = 1,
 +      .output_cdclk   = 1,
 +      .use_mpllin     = 1,
 +      .amp_gpio       = S3C2410_GPB(2),
 +      .amp_gain[0]    = S3C2410_GPD(10),
 +      .amp_gain[1]    = S3C2410_GPD(11),
 +};
 +
 +static void __init anubis_map_io(void)
 +{
 +      /* initialise the clocks */
 +
 +      s3c24xx_dclk0.parent = &clk_upll;
 +      s3c24xx_dclk0.rate   = 12*1000*1000;
 +
 +      s3c24xx_dclk1.parent = &clk_upll;
 +      s3c24xx_dclk1.rate   = 24*1000*1000;
 +
 +      s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
 +      s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
 +
 +      s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 +
 +      s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks));
 +
 +      s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
 +      s3c24xx_init_clocks(0);
 +      s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
 +
 +      /* check for the newer revision boards with large page nand */
 +
 +      if ((__raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK) >= 4) {
 +              printk(KERN_INFO "ANUBIS-B detected (revision %d)\n",
 +                     __raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK);
 +              anubis_nand_sets[0].partitions = anubis_default_nand_part_large;
 +              anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large);
 +      } else {
 +              /* ensure that the GPIO is setup */
 +              s3c2410_gpio_setpin(S3C2410_GPA(0), 1);
 +      }
 +}
 +
 +static void __init anubis_init(void)
 +{
 +      s3c_i2c0_set_platdata(NULL);
 +      s3c_nand_set_platdata(&anubis_nand_info);
 +      simtec_audio_add(NULL, false, &anubis_audio);
 +
 +      platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices));
 +
 +      i2c_register_board_info(0, anubis_i2c_devs,
 +                              ARRAY_SIZE(anubis_i2c_devs));
 +}
 +
 +
 +MACHINE_START(ANUBIS, "Simtec-Anubis")
 +      /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
 +      .atag_offset    = 0x100,
 +      .map_io         = anubis_map_io,
 +      .init_machine   = anubis_init,
 +      .init_irq       = s3c24xx_init_irq,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index d6a9763110cdccaa22e543eeea09d1d8faa6a321,0000000000000000000000000000000000000000..d7ae49c90118443cf0cc218f04a687945b6d1ab4
mode 100644,000000..100644
--- /dev/null
@@@ -1,226 -1,0 +1,226 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
 + *
 + * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
 + *      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
 + *      and modifications by SBZ <sbz@spgui.org> and
 + *      Weibing <http://weibing.blogbus.com>
 + *
 + * For product information, visit http://www.arm.com/
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/io.h>
 +#include <linux/serial_core.h>
 +#include <linux/dm9000.h>
 +#include <linux/platform_device.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <mach/hardware.h>
 +#include <mach/fb.h>
 +#include <asm/irq.h>
 +#include <asm/mach-types.h>
 +
 +#include <plat/regs-serial.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-mem.h>
 +#include <mach/regs-lcd.h>
 +#include <plat/nand.h>
 +#include <plat/iic.h>
 +
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/nand.h>
 +#include <linux/mtd/nand_ecc.h>
 +#include <linux/mtd/partitions.h>
 +
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +#include <plat/mci.h>
 +
 +#include "common.h"
 +
 +static struct map_desc at2440evb_iodesc[] __initdata = {
 +      /* Nothing here */
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT
 +#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 +#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 +
 +static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
 +      [0] = {
 +              .hwport      = 0,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +              .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 +      },
 +      [1] = {
 +              .hwport      = 1,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +              .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 +      },
 +};
 +
 +/* NAND Flash on AT2440EVB board */
 +
 +static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
 +      [0] = {
 +              .name   = "Boot Agent",
 +              .size   = SZ_256K,
 +              .offset = 0,
 +      },
 +      [1] = {
 +              .name   = "Kernel",
 +              .size   = SZ_2M,
 +              .offset = SZ_256K,
 +      },
 +      [2] = {
 +              .name   = "Root",
 +              .offset = SZ_256K + SZ_2M,
 +              .size   = MTDPART_SIZ_FULL,
 +      },
 +};
 +
 +static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
 +      [0] = {
 +              .name           = "nand",
 +              .nr_chips       = 1,
 +              .nr_partitions  = ARRAY_SIZE(at2440evb_default_nand_part),
 +              .partitions     = at2440evb_default_nand_part,
 +      },
 +};
 +
 +static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
 +      .tacls          = 25,
 +      .twrph0         = 55,
 +      .twrph1         = 40,
 +      .nr_sets        = ARRAY_SIZE(at2440evb_nand_sets),
 +      .sets           = at2440evb_nand_sets,
 +};
 +
 +/* DM9000AEP 10/100 ethernet controller */
 +
 +static struct resource at2440evb_dm9k_resource[] = {
 +      [0] = {
 +              .start = S3C2410_CS3,
 +              .end   = S3C2410_CS3 + 3,
 +              .flags = IORESOURCE_MEM
 +      },
 +      [1] = {
 +              .start = S3C2410_CS3 + 4,
 +              .end   = S3C2410_CS3 + 7,
 +              .flags = IORESOURCE_MEM
 +      },
 +      [2] = {
 +              .start = IRQ_EINT7,
 +              .end   = IRQ_EINT7,
 +              .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 +      }
 +};
 +
 +static struct dm9000_plat_data at2440evb_dm9k_pdata = {
 +      .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
 +};
 +
 +static struct platform_device at2440evb_device_eth = {
 +      .name           = "dm9000",
 +      .id             = -1,
 +      .num_resources  = ARRAY_SIZE(at2440evb_dm9k_resource),
 +      .resource       = at2440evb_dm9k_resource,
 +      .dev            = {
 +              .platform_data  = &at2440evb_dm9k_pdata,
 +      },
 +};
 +
 +static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
 +      .gpio_detect    = S3C2410_GPG(10),
 +};
 +
 +/* 7" LCD panel */
 +
 +static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
 +
 +      .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 +                        S3C2410_LCDCON5_INVVLINE |
 +                        S3C2410_LCDCON5_INVVFRAME |
 +                        S3C2410_LCDCON5_PWREN |
 +                        S3C2410_LCDCON5_HWSWP,
 +
 +      .type           = S3C2410_LCDCON1_TFT,
 +
 +      .width          = 800,
 +      .height         = 480,
 +
 +      .pixclock       = 33333, /* HCLK 60 MHz, divisor 2 */
 +      .xres           = 800,
 +      .yres           = 480,
 +      .bpp            = 16,
 +      .left_margin    = 88,
 +      .right_margin   = 40,
 +      .hsync_len      = 128,
 +      .upper_margin   = 32,
 +      .lower_margin   = 11,
 +      .vsync_len      = 2,
 +};
 +
 +static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
 +      .displays       = &at2440evb_lcd_cfg,
 +      .num_displays   = 1,
 +      .default_display = 0,
 +};
 +
 +static struct platform_device *at2440evb_devices[] __initdata = {
 +      &s3c_device_ohci,
 +      &s3c_device_wdt,
 +      &s3c_device_adc,
 +      &s3c_device_i2c0,
 +      &s3c_device_rtc,
 +      &s3c_device_nand,
 +      &s3c_device_sdi,
 +      &s3c_device_lcd,
 +      &at2440evb_device_eth,
 +};
 +
 +static void __init at2440evb_map_io(void)
 +{
 +      s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
 +      s3c24xx_init_clocks(16934400);
 +      s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
 +}
 +
 +static void __init at2440evb_init(void)
 +{
 +      s3c24xx_fb_set_platdata(&at2440evb_fb_info);
 +      s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
 +      s3c_nand_set_platdata(&at2440evb_nand_info);
 +      s3c_i2c0_set_platdata(NULL);
 +
 +      platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
 +}
 +
 +
 +MACHINE_START(AT2440EVB, "AT2440EVB")
 +      .atag_offset    = 0x100,
 +      .map_io         = at2440evb_map_io,
 +      .init_machine   = at2440evb_init,
 +      .init_irq       = s3c24xx_init_irq,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index d0e0ad4e6598b4430504fe2eb58df9b6266583c9,0000000000000000000000000000000000000000..ba5d85394105c4b611cbb121a2ca138b69d41db3
mode 100644,000000..100644
--- /dev/null
@@@ -1,605 -1,0 +1,605 @@@
-       .restart        = s3c2440_restart,
 +/*
 + * linux/arch/arm/mach-s3c2442/mach-gta02.c
 + *
 + * S3C2442 Machine Support for Openmoko GTA02 / FreeRunner.
 + *
 + * Copyright (C) 2006-2009 by Openmoko, Inc.
 + * Authors: Harald Welte <laforge@openmoko.org>
 + *          Andy Green <andy@openmoko.org>
 + *          Werner Almesberger <werner@openmoko.org>
 + * All rights reserved.
 + *
 + * This program is free software; you can redistribute it and/or
 + * modify it under the terms of the GNU General Public License as
 + * published by the Free Software Foundation; either version 2 of
 + * the License, or (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 + * MA 02111-1307 USA
 + *
 + */
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/delay.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/gpio.h>
 +#include <linux/workqueue.h>
 +#include <linux/platform_device.h>
 +#include <linux/serial_core.h>
 +#include <linux/spi/spi.h>
 +#include <linux/spi/s3c24xx.h>
 +
 +#include <linux/mmc/host.h>
 +
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/nand.h>
 +#include <linux/mtd/nand_ecc.h>
 +#include <linux/mtd/partitions.h>
 +#include <linux/mtd/physmap.h>
 +#include <linux/io.h>
 +
 +#include <linux/i2c.h>
 +#include <linux/regulator/machine.h>
 +
 +#include <linux/mfd/pcf50633/core.h>
 +#include <linux/mfd/pcf50633/mbc.h>
 +#include <linux/mfd/pcf50633/adc.h>
 +#include <linux/mfd/pcf50633/gpio.h>
 +#include <linux/mfd/pcf50633/pmic.h>
 +#include <linux/mfd/pcf50633/backlight.h>
 +
 +#include <linux/input.h>
 +#include <linux/gpio_keys.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <asm/irq.h>
 +#include <asm/mach-types.h>
 +
 +#include <mach/regs-irq.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-gpioj.h>
 +#include <mach/fb.h>
 +
 +#include <plat/usb-control.h>
 +#include <mach/regs-mem.h>
 +#include <mach/hardware.h>
 +
 +#include <mach/gta02.h>
 +
 +#include <plat/regs-serial.h>
 +#include <plat/nand.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +#include <plat/pm.h>
 +#include <plat/udc.h>
 +#include <plat/gpio-cfg.h>
 +#include <plat/iic.h>
 +#include <plat/ts.h>
 +
 +#include "common.h"
 +
 +static struct pcf50633 *gta02_pcf;
 +
 +/*
 + * This gets called frequently when we paniced.
 + */
 +
 +static long gta02_panic_blink(int state)
 +{
 +      long delay = 0;
 +      char led;
 +
 +      led = (state) ? 1 : 0;
 +      gpio_direction_output(GTA02_GPIO_AUX_LED, led);
 +
 +      return delay;
 +}
 +
 +
 +static struct map_desc gta02_iodesc[] __initdata = {
 +      {
 +              .virtual        = 0xe0000000,
 +              .pfn            = __phys_to_pfn(S3C2410_CS3 + 0x01000000),
 +              .length         = SZ_1M,
 +              .type           = MT_DEVICE
 +      },
 +};
 +
 +#define UCON (S3C2410_UCON_DEFAULT | S3C2443_UCON_RXERR_IRQEN)
 +#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 +#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 +
 +static struct s3c2410_uartcfg gta02_uartcfgs[] = {
 +      [0] = {
 +              .hwport         = 0,
 +              .flags          = 0,
 +              .ucon           = UCON,
 +              .ulcon          = ULCON,
 +              .ufcon          = UFCON,
 +      },
 +      [1] = {
 +              .hwport         = 1,
 +              .flags          = 0,
 +              .ucon           = UCON,
 +              .ulcon          = ULCON,
 +              .ufcon          = UFCON,
 +      },
 +      [2] = {
 +              .hwport         = 2,
 +              .flags          = 0,
 +              .ucon           = UCON,
 +              .ulcon          = ULCON,
 +              .ufcon          = UFCON,
 +      },
 +};
 +
 +#ifdef CONFIG_CHARGER_PCF50633
 +/*
 + * On GTA02 the 1A charger features a 48K resistor to 0V on the ID pin.
 + * We use this to recognize that we can pull 1A from the USB socket.
 + *
 + * These constants are the measured pcf50633 ADC levels with the 1A
 + * charger / 48K resistor, and with no pulldown resistor.
 + */
 +
 +#define ADC_NOM_CHG_DETECT_1A 6
 +#define ADC_NOM_CHG_DETECT_USB 43
 +
 +static void
 +gta02_configure_pmu_for_charger(struct pcf50633 *pcf, void *unused, int res)
 +{
 +      int  ma;
 +
 +      /* Interpret charger type */
 +      if (res < ((ADC_NOM_CHG_DETECT_USB + ADC_NOM_CHG_DETECT_1A) / 2)) {
 +
 +              /*
 +               * Sanity - stop GPO driving out now that we have a 1A charger
 +               * GPO controls USB Host power generation on GTA02
 +               */
 +              pcf50633_gpio_set(pcf, PCF50633_GPO, 0);
 +
 +              ma = 1000;
 +      } else
 +              ma = 100;
 +
 +      pcf50633_mbc_usb_curlim_set(pcf, ma);
 +}
 +
 +static struct delayed_work gta02_charger_work;
 +static int gta02_usb_vbus_draw;
 +
 +static void gta02_charger_worker(struct work_struct *work)
 +{
 +      if (gta02_usb_vbus_draw) {
 +              pcf50633_mbc_usb_curlim_set(gta02_pcf, gta02_usb_vbus_draw);
 +              return;
 +      }
 +
 +#ifdef CONFIG_PCF50633_ADC
 +      pcf50633_adc_async_read(gta02_pcf,
 +                              PCF50633_ADCC1_MUX_ADCIN1,
 +                              PCF50633_ADCC1_AVERAGE_16,
 +                              gta02_configure_pmu_for_charger,
 +                              NULL);
 +#else
 +      /*
 +       * If the PCF50633 ADC is disabled we fallback to a
 +       * 100mA limit for safety.
 +       */
 +      pcf50633_mbc_usb_curlim_set(pcf, 100);
 +#endif
 +}
 +
 +#define GTA02_CHARGER_CONFIGURE_TIMEOUT ((3000 * HZ) / 1000)
 +
 +static void gta02_pmu_event_callback(struct pcf50633 *pcf, int irq)
 +{
 +      if (irq == PCF50633_IRQ_USBINS) {
 +              schedule_delayed_work(&gta02_charger_work,
 +                                    GTA02_CHARGER_CONFIGURE_TIMEOUT);
 +
 +              return;
 +      }
 +
 +      if (irq == PCF50633_IRQ_USBREM) {
 +              cancel_delayed_work_sync(&gta02_charger_work);
 +              gta02_usb_vbus_draw = 0;
 +      }
 +}
 +
 +static void gta02_udc_vbus_draw(unsigned int ma)
 +{
 +      if (!gta02_pcf)
 +              return;
 +
 +      gta02_usb_vbus_draw = ma;
 +
 +      schedule_delayed_work(&gta02_charger_work,
 +                            GTA02_CHARGER_CONFIGURE_TIMEOUT);
 +}
 +#else /* !CONFIG_CHARGER_PCF50633 */
 +#define gta02_pmu_event_callback      NULL
 +#define gta02_udc_vbus_draw           NULL
 +#endif
 +
 +/*
 + * This is called when pc50633 is probed, unfortunately quite late in the
 + * day since it is an I2C bus device. Here we can belatedly define some
 + * platform devices with the advantage that we can mark the pcf50633 as the
 + * parent. This makes them get suspended and resumed with their parent
 + * the pcf50633 still around.
 + */
 +
 +static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf);
 +
 +
 +static char *gta02_batteries[] = {
 +      "battery",
 +};
 +
 +static struct pcf50633_bl_platform_data gta02_backlight_data = {
 +      .default_brightness = 0x3f,
 +      .default_brightness_limit = 0,
 +      .ramp_time = 5,
 +};
 +
 +static struct pcf50633_platform_data gta02_pcf_pdata = {
 +      .resumers = {
 +              [0] =   PCF50633_INT1_USBINS |
 +                      PCF50633_INT1_USBREM |
 +                      PCF50633_INT1_ALARM,
 +              [1] =   PCF50633_INT2_ONKEYF,
 +              [2] =   PCF50633_INT3_ONKEY1S,
 +              [3] =   PCF50633_INT4_LOWSYS |
 +                      PCF50633_INT4_LOWBAT |
 +                      PCF50633_INT4_HIGHTMP,
 +      },
 +
 +      .batteries = gta02_batteries,
 +      .num_batteries = ARRAY_SIZE(gta02_batteries),
 +
 +      .charger_reference_current_ma = 1000,
 +
 +      .backlight_data = &gta02_backlight_data,
 +
 +      .reg_init_data = {
 +              [PCF50633_REGULATOR_AUTO] = {
 +                      .constraints = {
 +                              .min_uV = 3300000,
 +                              .max_uV = 3300000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .always_on = 1,
 +                              .apply_uV = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_DOWN1] = {
 +                      .constraints = {
 +                              .min_uV = 1300000,
 +                              .max_uV = 1600000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .always_on = 1,
 +                              .apply_uV = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_DOWN2] = {
 +                      .constraints = {
 +                              .min_uV = 1800000,
 +                              .max_uV = 1800000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .apply_uV = 1,
 +                              .always_on = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_HCLDO] = {
 +                      .constraints = {
 +                              .min_uV = 2000000,
 +                              .max_uV = 3300000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
 +                                              REGULATOR_CHANGE_STATUS,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_LDO1] = {
 +                      .constraints = {
 +                              .min_uV = 3300000,
 +                              .max_uV = 3300000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +                              .apply_uV = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_LDO2] = {
 +                      .constraints = {
 +                              .min_uV = 3300000,
 +                              .max_uV = 3300000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .apply_uV = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_LDO3] = {
 +                      .constraints = {
 +                              .min_uV = 3000000,
 +                              .max_uV = 3000000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .apply_uV = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_LDO4] = {
 +                      .constraints = {
 +                              .min_uV = 3200000,
 +                              .max_uV = 3200000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +                              .apply_uV = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_LDO5] = {
 +                      .constraints = {
 +                              .min_uV = 3000000,
 +                              .max_uV = 3000000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                              .valid_ops_mask = REGULATOR_CHANGE_STATUS,
 +                              .apply_uV = 1,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_LDO6] = {
 +                      .constraints = {
 +                              .min_uV = 3000000,
 +                              .max_uV = 3000000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                      },
 +              },
 +              [PCF50633_REGULATOR_MEMLDO] = {
 +                      .constraints = {
 +                              .min_uV = 1800000,
 +                              .max_uV = 1800000,
 +                              .valid_modes_mask = REGULATOR_MODE_NORMAL,
 +                      },
 +              },
 +
 +      },
 +      .probe_done = gta02_pmu_attach_child_devices,
 +      .mbc_event_callback = gta02_pmu_event_callback,
 +};
 +
 +
 +/* NOR Flash. */
 +
 +#define GTA02_FLASH_BASE      0x18000000 /* GCS3 */
 +#define GTA02_FLASH_SIZE      0x200000 /* 2MBytes */
 +
 +static struct physmap_flash_data gta02_nor_flash_data = {
 +      .width          = 2,
 +};
 +
 +static struct resource gta02_nor_flash_resource = {
 +      .start          = GTA02_FLASH_BASE,
 +      .end            = GTA02_FLASH_BASE + GTA02_FLASH_SIZE - 1,
 +      .flags          = IORESOURCE_MEM,
 +};
 +
 +static struct platform_device gta02_nor_flash = {
 +      .name           = "physmap-flash",
 +      .id             = 0,
 +      .dev            = {
 +              .platform_data  = &gta02_nor_flash_data,
 +      },
 +      .resource       = &gta02_nor_flash_resource,
 +      .num_resources  = 1,
 +};
 +
 +
 +static struct platform_device s3c24xx_pwm_device = {
 +      .name           = "s3c24xx_pwm",
 +      .num_resources  = 0,
 +};
 +
 +static struct platform_device gta02_dfbmcs320_device = {
 +      .name = "dfbmcs320",
 +};
 +
 +static struct i2c_board_info gta02_i2c_devs[] __initdata = {
 +      {
 +              I2C_BOARD_INFO("pcf50633", 0x73),
 +              .irq = GTA02_IRQ_PCF50633,
 +              .platform_data = &gta02_pcf_pdata,
 +      },
 +      {
 +              I2C_BOARD_INFO("wm8753", 0x1a),
 +      },
 +};
 +
 +static struct s3c2410_nand_set __initdata gta02_nand_sets[] = {
 +      [0] = {
 +              /*
 +               * This name is also hard-coded in the boot loaders, so
 +               * changing it would would require all users to upgrade
 +               * their boot loaders, some of which are stored in a NOR
 +               * that is considered to be immutable.
 +               */
 +              .name           = "neo1973-nand",
 +              .nr_chips       = 1,
 +              .flash_bbt      = 1,
 +      },
 +};
 +
 +/*
 + * Choose a set of timings derived from S3C@2442B MCP54
 + * data sheet (K5D2G13ACM-D075 MCP Memory).
 + */
 +
 +static struct s3c2410_platform_nand __initdata gta02_nand_info = {
 +      .tacls          = 0,
 +      .twrph0         = 25,
 +      .twrph1         = 15,
 +      .nr_sets        = ARRAY_SIZE(gta02_nand_sets),
 +      .sets           = gta02_nand_sets,
 +};
 +
 +
 +/* Get PMU to set USB current limit accordingly. */
 +static struct s3c2410_udc_mach_info gta02_udc_cfg __initdata = {
 +      .vbus_draw      = gta02_udc_vbus_draw,
 +      .pullup_pin = GTA02_GPIO_USB_PULLUP,
 +};
 +
 +/* USB */
 +static struct s3c2410_hcd_info gta02_usb_info __initdata = {
 +      .port[0]        = {
 +              .flags  = S3C_HCDFLG_USED,
 +      },
 +      .port[1]        = {
 +              .flags  = 0,
 +      },
 +};
 +
 +/* Touchscreen */
 +static struct s3c2410_ts_mach_info gta02_ts_info = {
 +      .delay                  = 10000,
 +      .presc                  = 0xff, /* slow as we can go */
 +      .oversampling_shift     = 2,
 +};
 +
 +/* Buttons */
 +static struct gpio_keys_button gta02_buttons[] = {
 +      {
 +              .gpio = GTA02_GPIO_AUX_KEY,
 +              .code = KEY_PHONE,
 +              .desc = "Aux",
 +              .type = EV_KEY,
 +              .debounce_interval = 100,
 +      },
 +      {
 +              .gpio = GTA02_GPIO_HOLD_KEY,
 +              .code = KEY_PAUSE,
 +              .desc = "Hold",
 +              .type = EV_KEY,
 +              .debounce_interval = 100,
 +      },
 +};
 +
 +static struct gpio_keys_platform_data gta02_buttons_pdata = {
 +      .buttons = gta02_buttons,
 +      .nbuttons = ARRAY_SIZE(gta02_buttons),
 +};
 +
 +static struct platform_device gta02_buttons_device = {
 +      .name = "gpio-keys",
 +      .id = -1,
 +      .dev = {
 +              .platform_data = &gta02_buttons_pdata,
 +      },
 +};
 +
 +static void __init gta02_map_io(void)
 +{
 +      s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc));
 +      s3c24xx_init_clocks(12000000);
 +      s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs));
 +}
 +
 +
 +/* These are the guys that don't need to be children of PMU. */
 +
 +static struct platform_device *gta02_devices[] __initdata = {
 +      &s3c_device_ohci,
 +      &s3c_device_wdt,
 +      &s3c_device_sdi,
 +      &s3c_device_usbgadget,
 +      &s3c_device_nand,
 +      &gta02_nor_flash,
 +      &s3c24xx_pwm_device,
 +      &s3c_device_iis,
 +      &samsung_asoc_dma,
 +      &s3c_device_i2c0,
 +      &gta02_dfbmcs320_device,
 +      &gta02_buttons_device,
 +      &s3c_device_adc,
 +      &s3c_device_ts,
 +};
 +
 +/* These guys DO need to be children of PMU. */
 +
 +static struct platform_device *gta02_devices_pmu_children[] = {
 +};
 +
 +
 +/*
 + * This is called when pc50633 is probed, quite late in the day since it is an
 + * I2C bus device.  Here we can define platform devices with the advantage that
 + * we can mark the pcf50633 as the parent.  This makes them get suspended and
 + * resumed with their parent the pcf50633 still around.  All devices whose
 + * operation depends on something from pcf50633 must have this relationship
 + * made explicit like this, or suspend and resume will become an unreliable
 + * hellworld.
 + */
 +
 +static void gta02_pmu_attach_child_devices(struct pcf50633 *pcf)
 +{
 +      int n;
 +
 +      /* Grab a copy of the now probed PMU pointer. */
 +      gta02_pcf = pcf;
 +
 +      for (n = 0; n < ARRAY_SIZE(gta02_devices_pmu_children); n++)
 +              gta02_devices_pmu_children[n]->dev.parent = pcf->dev;
 +
 +      platform_add_devices(gta02_devices_pmu_children,
 +                           ARRAY_SIZE(gta02_devices_pmu_children));
 +}
 +
 +static void gta02_poweroff(void)
 +{
 +      pcf50633_reg_set_bit_mask(gta02_pcf, PCF50633_REG_OOCSHDWN, 1, 1);
 +}
 +
 +static void __init gta02_machine_init(void)
 +{
 +      /* Set the panic callback to turn AUX LED on or off. */
 +      panic_blink = gta02_panic_blink;
 +
 +      s3c_pm_init();
 +
 +#ifdef CONFIG_CHARGER_PCF50633
 +      INIT_DELAYED_WORK(&gta02_charger_work, gta02_charger_worker);
 +#endif
 +
 +      s3c24xx_udc_set_platdata(&gta02_udc_cfg);
 +      s3c24xx_ts_set_platdata(&gta02_ts_info);
 +      s3c_ohci_set_platdata(&gta02_usb_info);
 +      s3c_nand_set_platdata(&gta02_nand_info);
 +      s3c_i2c0_set_platdata(NULL);
 +
 +      i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs));
 +
 +      platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices));
 +      pm_power_off = gta02_poweroff;
 +
 +      regulator_has_full_constraints();
 +}
 +
 +
 +MACHINE_START(NEO1973_GTA02, "GTA02")
 +      /* Maintainer: Nelson Castillo <arhuaco@freaks-unidos.net> */
 +      .atag_offset    = 0x100,
 +      .map_io         = gta02_map_io,
 +      .init_irq       = s3c24xx_init_irq,
 +      .init_machine   = gta02_machine_init,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index adbbb85bc4cdd636f4196c4bf50468a21d7f0974,0000000000000000000000000000000000000000..5d66fb218a41bcb121c5845e201009ffe0a0bbab
mode 100644,000000..100644
--- /dev/null
@@@ -1,705 -1,0 +1,705 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-mini2440.c
 + *
 + * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
 + *      Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
 + *      and modifications by SBZ <sbz@spgui.org> and
 + *      Weibing <http://weibing.blogbus.com> and
 + *      Michel Pollet <buserror@gmail.com>
 + *
 + * For product information, visit http://code.google.com/p/mini2440/
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/gpio.h>
 +#include <linux/input.h>
 +#include <linux/io.h>
 +#include <linux/serial_core.h>
 +#include <linux/dm9000.h>
 +#include <linux/i2c/at24.h>
 +#include <linux/platform_device.h>
 +#include <linux/gpio_keys.h>
 +#include <linux/i2c.h>
 +#include <linux/mmc/host.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +
 +#include <mach/hardware.h>
 +#include <mach/fb.h>
 +#include <asm/mach-types.h>
 +
 +#include <plat/regs-serial.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/leds-gpio.h>
 +#include <mach/regs-mem.h>
 +#include <mach/regs-lcd.h>
 +#include <mach/irqs.h>
 +#include <plat/nand.h>
 +#include <plat/iic.h>
 +#include <plat/mci.h>
 +#include <plat/udc.h>
 +
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/nand.h>
 +#include <linux/mtd/nand_ecc.h>
 +#include <linux/mtd/partitions.h>
 +
 +#include <plat/gpio-cfg.h>
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +
 +#include <sound/s3c24xx_uda134x.h>
 +
 +#include "common.h"
 +
 +#define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300)
 +
 +static struct map_desc mini2440_iodesc[] __initdata = {
 +      /* nothing to declare, move along */
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT
 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 +
 +
 +static struct s3c2410_uartcfg mini2440_uartcfgs[] __initdata = {
 +      [0] = {
 +              .hwport      = 0,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +      },
 +      [1] = {
 +              .hwport      = 1,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +      },
 +      [2] = {
 +              .hwport      = 2,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +      },
 +};
 +
 +/* USB device UDC support */
 +
 +static struct s3c2410_udc_mach_info mini2440_udc_cfg __initdata = {
 +      .pullup_pin = S3C2410_GPC(5),
 +};
 +
 +
 +/* LCD timing and setup */
 +
 +/*
 + * This macro simplifies the table bellow
 + */
 +#define _LCD_DECLARE(_clock,_xres,margin_left,margin_right,hsync, \
 +                      _yres,margin_top,margin_bottom,vsync, refresh) \
 +      .width = _xres, \
 +      .xres = _xres, \
 +      .height = _yres, \
 +      .yres = _yres, \
 +      .left_margin    = margin_left,  \
 +      .right_margin   = margin_right, \
 +      .upper_margin   = margin_top,   \
 +      .lower_margin   = margin_bottom,        \
 +      .hsync_len      = hsync,        \
 +      .vsync_len      = vsync,        \
 +      .pixclock       = ((_clock*100000000000LL) /    \
 +                         ((refresh) * \
 +                         (hsync + margin_left + _xres + margin_right) * \
 +                         (vsync + margin_top + _yres + margin_bottom))), \
 +      .bpp            = 16,\
 +      .type           = (S3C2410_LCDCON1_TFT16BPP |\
 +                         S3C2410_LCDCON1_TFT)
 +
 +static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
 +      [0] = { /* mini2440 + 3.5" TFT + touchscreen */
 +              _LCD_DECLARE(
 +                      7,                      /* The 3.5 is quite fast */
 +                      240, 21, 38, 6,         /* x timing */
 +                      320, 4, 4, 2,           /* y timing */
 +                      60),                    /* refresh rate */
 +              .lcdcon5        = (S3C2410_LCDCON5_FRM565 |
 +                                 S3C2410_LCDCON5_INVVLINE |
 +                                 S3C2410_LCDCON5_INVVFRAME |
 +                                 S3C2410_LCDCON5_INVVDEN |
 +                                 S3C2410_LCDCON5_PWREN),
 +      },
 +      [1] = { /* mini2440 + 7" TFT + touchscreen */
 +              _LCD_DECLARE(
 +                      10,                     /* the 7" runs slower */
 +                      800, 40, 40, 48,        /* x timing */
 +                      480, 29, 3, 3,          /* y timing */
 +                      50),                    /* refresh rate */
 +              .lcdcon5        = (S3C2410_LCDCON5_FRM565 |
 +                                 S3C2410_LCDCON5_INVVLINE |
 +                                 S3C2410_LCDCON5_INVVFRAME |
 +                                 S3C2410_LCDCON5_PWREN),
 +      },
 +      /* The VGA shield can outout at several resolutions. All share 
 +       * the same timings, however, anything smaller than 1024x768
 +       * will only be displayed in the top left corner of a 1024x768
 +       * XGA output unless you add optional dip switches to the shield.
 +       * Therefore timings for other resolutions have been omitted here.
 +       */
 +      [2] = {
 +              _LCD_DECLARE(
 +                      10,
 +                      1024, 1, 2, 2,          /* y timing */
 +                      768, 200, 16, 16,       /* x timing */
 +                      24),    /* refresh rate, maximum stable,
 +                               tested with the FPGA shield */
 +              .lcdcon5        = (S3C2410_LCDCON5_FRM565 |
 +                                 S3C2410_LCDCON5_HWSWP),
 +      },
 +      /* mini2440 + 3.5" TFT (LCD-W35i, LQ035Q1DG06 type) + touchscreen*/
 +      [3] = {
 +              _LCD_DECLARE(
 +                      /* clock */
 +                      7,
 +                      /* xres, margin_right, margin_left, hsync */
 +                      320, 68, 66, 4,
 +                      /* yres, margin_top, margin_bottom, vsync */
 +                      240, 4, 4, 9,
 +                      /* refresh rate */
 +                      60),
 +              .lcdcon5        = (S3C2410_LCDCON5_FRM565 |
 +                                 S3C2410_LCDCON5_INVVDEN |
 +                                 S3C2410_LCDCON5_INVVFRAME |
 +                                 S3C2410_LCDCON5_INVVLINE |
 +                                 S3C2410_LCDCON5_INVVCLK |
 +                                 S3C2410_LCDCON5_HWSWP),
 +      },
 +};
 +
 +/* todo - put into gpio header */
 +
 +#define S3C2410_GPCCON_MASK(x)        (3 << ((x) * 2))
 +#define S3C2410_GPDCON_MASK(x)        (3 << ((x) * 2))
 +
 +static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
 +      .displays        = &mini2440_lcd_cfg[0], /* not constant! see init */
 +      .num_displays    = 1,
 +      .default_display = 0,
 +
 +      /* Enable VD[2..7], VD[10..15], VD[18..23] and VCLK, syncs, VDEN
 +       * and disable the pull down resistors on pins we are using for LCD
 +       * data. */
 +
 +      .gpcup          = (0xf << 1) | (0x3f << 10),
 +
 +      .gpccon         = (S3C2410_GPC1_VCLK   | S3C2410_GPC2_VLINE |
 +                         S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM |
 +                         S3C2410_GPC10_VD2   | S3C2410_GPC11_VD3 |
 +                         S3C2410_GPC12_VD4   | S3C2410_GPC13_VD5 |
 +                         S3C2410_GPC14_VD6   | S3C2410_GPC15_VD7),
 +
 +      .gpccon_mask    = (S3C2410_GPCCON_MASK(1)  | S3C2410_GPCCON_MASK(2)  |
 +                         S3C2410_GPCCON_MASK(3)  | S3C2410_GPCCON_MASK(4)  |
 +                         S3C2410_GPCCON_MASK(10) | S3C2410_GPCCON_MASK(11) |
 +                         S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) |
 +                         S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)),
 +
 +      .gpdup          = (0x3f << 2) | (0x3f << 10),
 +
 +      .gpdcon         = (S3C2410_GPD2_VD10  | S3C2410_GPD3_VD11 |
 +                         S3C2410_GPD4_VD12  | S3C2410_GPD5_VD13 |
 +                         S3C2410_GPD6_VD14  | S3C2410_GPD7_VD15 |
 +                         S3C2410_GPD10_VD18 | S3C2410_GPD11_VD19 |
 +                         S3C2410_GPD12_VD20 | S3C2410_GPD13_VD21 |
 +                         S3C2410_GPD14_VD22 | S3C2410_GPD15_VD23),
 +
 +      .gpdcon_mask    = (S3C2410_GPDCON_MASK(2)  | S3C2410_GPDCON_MASK(3) |
 +                         S3C2410_GPDCON_MASK(4)  | S3C2410_GPDCON_MASK(5) |
 +                         S3C2410_GPDCON_MASK(6)  | S3C2410_GPDCON_MASK(7) |
 +                         S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)|
 +                         S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)|
 +                         S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)),
 +};
 +
 +/* MMC/SD  */
 +
 +static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = {
 +   .gpio_detect   = S3C2410_GPG(8),
 +   .gpio_wprotect = S3C2410_GPH(8),
 +   .set_power     = NULL,
 +   .ocr_avail     = MMC_VDD_32_33|MMC_VDD_33_34,
 +};
 +
 +/* NAND Flash on MINI2440 board */
 +
 +static struct mtd_partition mini2440_default_nand_part[] __initdata = {
 +      [0] = {
 +              .name   = "u-boot",
 +              .size   = SZ_256K,
 +              .offset = 0,
 +      },
 +      [1] = {
 +              .name   = "u-boot-env",
 +              .size   = SZ_128K,
 +              .offset = SZ_256K,
 +      },
 +      [2] = {
 +              .name   = "kernel",
 +              /* 5 megabytes, for a kernel with no modules
 +               * or a uImage with a ramdisk attached */
 +              .size   = 0x00500000,
 +              .offset = SZ_256K + SZ_128K,
 +      },
 +      [3] = {
 +              .name   = "root",
 +              .offset = SZ_256K + SZ_128K + 0x00500000,
 +              .size   = MTDPART_SIZ_FULL,
 +      },
 +};
 +
 +static struct s3c2410_nand_set mini2440_nand_sets[] __initdata = {
 +      [0] = {
 +              .name           = "nand",
 +              .nr_chips       = 1,
 +              .nr_partitions  = ARRAY_SIZE(mini2440_default_nand_part),
 +              .partitions     = mini2440_default_nand_part,
 +              .flash_bbt      = 1, /* we use u-boot to create a BBT */
 +      },
 +};
 +
 +static struct s3c2410_platform_nand mini2440_nand_info __initdata = {
 +      .tacls          = 0,
 +      .twrph0         = 25,
 +      .twrph1         = 15,
 +      .nr_sets        = ARRAY_SIZE(mini2440_nand_sets),
 +      .sets           = mini2440_nand_sets,
 +      .ignore_unset_ecc = 1,
 +};
 +
 +/* DM9000AEP 10/100 ethernet controller */
 +
 +static struct resource mini2440_dm9k_resource[] = {
 +      [0] = {
 +              .start = MACH_MINI2440_DM9K_BASE,
 +              .end   = MACH_MINI2440_DM9K_BASE + 3,
 +              .flags = IORESOURCE_MEM
 +      },
 +      [1] = {
 +              .start = MACH_MINI2440_DM9K_BASE + 4,
 +              .end   = MACH_MINI2440_DM9K_BASE + 7,
 +              .flags = IORESOURCE_MEM
 +      },
 +      [2] = {
 +              .start = IRQ_EINT7,
 +              .end   = IRQ_EINT7,
 +              .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 +      }
 +};
 +
 +/*
 + * The DM9000 has no eeprom, and it's MAC address is set by
 + * the bootloader before starting the kernel.
 + */
 +static struct dm9000_plat_data mini2440_dm9k_pdata = {
 +      .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
 +};
 +
 +static struct platform_device mini2440_device_eth = {
 +      .name           = "dm9000",
 +      .id             = -1,
 +      .num_resources  = ARRAY_SIZE(mini2440_dm9k_resource),
 +      .resource       = mini2440_dm9k_resource,
 +      .dev            = {
 +              .platform_data  = &mini2440_dm9k_pdata,
 +      },
 +};
 +
 +/*  CON5
 + *    +--+     /-----\
 + *    |  |    |       |
 + *    |  |    |  BAT  |
 + *    |  |     \_____/
 + *    |  |
 + *    |  |  +----+  +----+
 + *    |  |  | K5 |  | K1 |
 + *    |  |  +----+  +----+
 + *    |  |  +----+  +----+
 + *    |  |  | K4 |  | K2 |
 + *    |  |  +----+  +----+
 + *    |  |  +----+  +----+
 + *    |  |  | K6 |  | K3 |
 + *    |  |  +----+  +----+
 + *      .....
 + */
 +static struct gpio_keys_button mini2440_buttons[] = {
 +      {
 +              .gpio           = S3C2410_GPG(0),               /* K1 */
 +              .code           = KEY_F1,
 +              .desc           = "Button 1",
 +              .active_low     = 1,
 +      },
 +      {
 +              .gpio           = S3C2410_GPG(3),               /* K2 */
 +              .code           = KEY_F2,
 +              .desc           = "Button 2",
 +              .active_low     = 1,
 +      },
 +      {
 +              .gpio           = S3C2410_GPG(5),               /* K3 */
 +              .code           = KEY_F3,
 +              .desc           = "Button 3",
 +              .active_low     = 1,
 +      },
 +      {
 +              .gpio           = S3C2410_GPG(6),               /* K4 */
 +              .code           = KEY_POWER,
 +              .desc           = "Power",
 +              .active_low     = 1,
 +      },
 +      {
 +              .gpio           = S3C2410_GPG(7),               /* K5 */
 +              .code           = KEY_F5,
 +              .desc           = "Button 5",
 +              .active_low     = 1,
 +      },
 +#if 0
 +      /* this pin is also known as TCLK1 and seems to already
 +       * marked as "in use" somehow in the kernel -- possibly wrongly */
 +      {
 +              .gpio           = S3C2410_GPG(11),      /* K6 */
 +              .code           = KEY_F6,
 +              .desc           = "Button 6",
 +              .active_low     = 1,
 +      },
 +#endif
 +};
 +
 +static struct gpio_keys_platform_data mini2440_button_data = {
 +      .buttons        = mini2440_buttons,
 +      .nbuttons       = ARRAY_SIZE(mini2440_buttons),
 +};
 +
 +static struct platform_device mini2440_button_device = {
 +      .name           = "gpio-keys",
 +      .id             = -1,
 +      .dev            = {
 +              .platform_data  = &mini2440_button_data,
 +      }
 +};
 +
 +/* LEDS */
 +
 +static struct s3c24xx_led_platdata mini2440_led1_pdata = {
 +      .name           = "led1",
 +      .gpio           = S3C2410_GPB(5),
 +      .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 +      .def_trigger    = "heartbeat",
 +};
 +
 +static struct s3c24xx_led_platdata mini2440_led2_pdata = {
 +      .name           = "led2",
 +      .gpio           = S3C2410_GPB(6),
 +      .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 +      .def_trigger    = "nand-disk",
 +};
 +
 +static struct s3c24xx_led_platdata mini2440_led3_pdata = {
 +      .name           = "led3",
 +      .gpio           = S3C2410_GPB(7),
 +      .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 +      .def_trigger    = "mmc0",
 +};
 +
 +static struct s3c24xx_led_platdata mini2440_led4_pdata = {
 +      .name           = "led4",
 +      .gpio           = S3C2410_GPB(8),
 +      .flags          = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
 +      .def_trigger    = "",
 +};
 +
 +static struct s3c24xx_led_platdata mini2440_led_backlight_pdata = {
 +      .name           = "backlight",
 +      .gpio           = S3C2410_GPG(4),
 +      .def_trigger    = "backlight",
 +};
 +
 +static struct platform_device mini2440_led1 = {
 +      .name           = "s3c24xx_led",
 +      .id             = 1,
 +      .dev            = {
 +              .platform_data  = &mini2440_led1_pdata,
 +      },
 +};
 +
 +static struct platform_device mini2440_led2 = {
 +      .name           = "s3c24xx_led",
 +      .id             = 2,
 +      .dev            = {
 +              .platform_data  = &mini2440_led2_pdata,
 +      },
 +};
 +
 +static struct platform_device mini2440_led3 = {
 +      .name           = "s3c24xx_led",
 +      .id             = 3,
 +      .dev            = {
 +              .platform_data  = &mini2440_led3_pdata,
 +      },
 +};
 +
 +static struct platform_device mini2440_led4 = {
 +      .name           = "s3c24xx_led",
 +      .id             = 4,
 +      .dev            = {
 +              .platform_data  = &mini2440_led4_pdata,
 +      },
 +};
 +
 +static struct platform_device mini2440_led_backlight = {
 +      .name           = "s3c24xx_led",
 +      .id             = 5,
 +      .dev            = {
 +              .platform_data  = &mini2440_led_backlight_pdata,
 +      },
 +};
 +
 +/* AUDIO */
 +
 +static struct s3c24xx_uda134x_platform_data mini2440_audio_pins = {
 +      .l3_clk = S3C2410_GPB(4),
 +      .l3_mode = S3C2410_GPB(2),
 +      .l3_data = S3C2410_GPB(3),
 +      .model = UDA134X_UDA1341
 +};
 +
 +static struct platform_device mini2440_audio = {
 +      .name           = "s3c24xx_uda134x",
 +      .id             = 0,
 +      .dev            = {
 +              .platform_data  = &mini2440_audio_pins,
 +      },
 +};
 +
 +/*
 + * I2C devices
 + */
 +static struct at24_platform_data at24c08 = {
 +      .byte_len       = SZ_8K / 8,
 +      .page_size      = 16,
 +};
 +
 +static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
 +      {
 +              I2C_BOARD_INFO("24c08", 0x50),
 +              .platform_data = &at24c08,
 +      },
 +};
 +
 +static struct platform_device uda1340_codec = {
 +              .name = "uda134x-codec",
 +              .id = -1,
 +};
 +
 +static struct platform_device *mini2440_devices[] __initdata = {
 +      &s3c_device_ohci,
 +      &s3c_device_wdt,
 +      &s3c_device_i2c0,
 +      &s3c_device_rtc,
 +      &s3c_device_usbgadget,
 +      &mini2440_device_eth,
 +      &mini2440_led1,
 +      &mini2440_led2,
 +      &mini2440_led3,
 +      &mini2440_led4,
 +      &mini2440_button_device,
 +      &s3c_device_nand,
 +      &s3c_device_sdi,
 +      &s3c_device_iis,
 +      &uda1340_codec,
 +      &mini2440_audio,
 +      &samsung_asoc_dma,
 +};
 +
 +static void __init mini2440_map_io(void)
 +{
 +      s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc));
 +      s3c24xx_init_clocks(12000000);
 +      s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs));
 +}
 +
 +/*
 + * mini2440_features string
 + *
 + * t = Touchscreen present
 + * b = backlight control
 + * c = camera [TODO]
 + * 0-9 LCD configuration
 + *
 + */
 +static char mini2440_features_str[12] __initdata = "0tb";
 +
 +static int __init mini2440_features_setup(char *str)
 +{
 +      if (str)
 +              strlcpy(mini2440_features_str, str, sizeof(mini2440_features_str));
 +      return 1;
 +}
 +
 +__setup("mini2440=", mini2440_features_setup);
 +
 +#define FEATURE_SCREEN (1 << 0)
 +#define FEATURE_BACKLIGHT (1 << 1)
 +#define FEATURE_TOUCH (1 << 2)
 +#define FEATURE_CAMERA (1 << 3)
 +
 +struct mini2440_features_t {
 +      int count;
 +      int done;
 +      int lcd_index;
 +      struct platform_device *optional[8];
 +};
 +
 +static void __init mini2440_parse_features(
 +              struct mini2440_features_t * features,
 +              const char * features_str )
 +{
 +      const char * fp = features_str;
 +
 +      features->count = 0;
 +      features->done = 0;
 +      features->lcd_index = -1;
 +
 +      while (*fp) {
 +              char f = *fp++;
 +
 +              switch (f) {
 +              case '0'...'9': /* tft screen */
 +                      if (features->done & FEATURE_SCREEN) {
 +                              printk(KERN_INFO "MINI2440: '%c' ignored, "
 +                                      "screen type already set\n", f);
 +                      } else {
 +                              int li = f - '0';
 +                              if (li >= ARRAY_SIZE(mini2440_lcd_cfg))
 +                                      printk(KERN_INFO "MINI2440: "
 +                                              "'%c' out of range LCD mode\n", f);
 +                              else {
 +                                      features->optional[features->count++] =
 +                                                      &s3c_device_lcd;
 +                                      features->lcd_index = li;
 +                              }
 +                      }
 +                      features->done |= FEATURE_SCREEN;
 +                      break;
 +              case 'b':
 +                      if (features->done & FEATURE_BACKLIGHT)
 +                              printk(KERN_INFO "MINI2440: '%c' ignored, "
 +                                      "backlight already set\n", f);
 +                      else {
 +                              features->optional[features->count++] =
 +                                              &mini2440_led_backlight;
 +                      }
 +                      features->done |= FEATURE_BACKLIGHT;
 +                      break;
 +              case 't':
 +                      printk(KERN_INFO "MINI2440: '%c' ignored, "
 +                              "touchscreen not compiled in\n", f);
 +                      break;
 +              case 'c':
 +                      if (features->done & FEATURE_CAMERA)
 +                              printk(KERN_INFO "MINI2440: '%c' ignored, "
 +                                      "camera already registered\n", f);
 +                      else
 +                              features->optional[features->count++] =
 +                                      &s3c_device_camif;
 +                      features->done |= FEATURE_CAMERA;
 +                      break;
 +              }
 +      }
 +}
 +
 +static void __init mini2440_init(void)
 +{
 +      struct mini2440_features_t features = { 0 };
 +      int i;
 +
 +      printk(KERN_INFO "MINI2440: Option string mini2440=%s\n",
 +                      mini2440_features_str);
 +
 +      /* Parse the feature string */
 +      mini2440_parse_features(&features, mini2440_features_str);
 +
 +      /* turn LCD on */
 +      s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND);
 +
 +      /* Turn the backlight early on */
 +      WARN_ON(gpio_request(S3C2410_GPG(4), "backlight"));
 +      gpio_direction_output(S3C2410_GPG(4), 1);
 +
 +      /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */
 +      s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP);
 +      s3c2410_gpio_setpin(S3C2410_GPB(1), 0);
 +      s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPIO_INPUT);
 +
 +      /* mark the key as input, without pullups (there is one on the board) */
 +      for (i = 0; i < ARRAY_SIZE(mini2440_buttons); i++) {
 +              s3c_gpio_setpull(mini2440_buttons[i].gpio, S3C_GPIO_PULL_UP);
 +              s3c_gpio_cfgpin(mini2440_buttons[i].gpio, S3C2410_GPIO_INPUT);
 +      }
 +      if (features.lcd_index != -1) {
 +              int li;
 +
 +              mini2440_fb_info.displays =
 +                      &mini2440_lcd_cfg[features.lcd_index];
 +
 +              printk(KERN_INFO "MINI2440: LCD");
 +              for (li = 0; li < ARRAY_SIZE(mini2440_lcd_cfg); li++)
 +                      if (li == features.lcd_index)
 +                              printk(" [%d:%dx%d]", li,
 +                                      mini2440_lcd_cfg[li].width,
 +                                      mini2440_lcd_cfg[li].height);
 +                      else
 +                              printk(" %d:%dx%d", li,
 +                                      mini2440_lcd_cfg[li].width,
 +                                      mini2440_lcd_cfg[li].height);
 +              printk("\n");
 +              s3c24xx_fb_set_platdata(&mini2440_fb_info);
 +      }
 +
 +      s3c24xx_udc_set_platdata(&mini2440_udc_cfg);
 +      s3c24xx_mci_set_platdata(&mini2440_mmc_cfg);
 +      s3c_nand_set_platdata(&mini2440_nand_info);
 +      s3c_i2c0_set_platdata(NULL);
 +
 +      i2c_register_board_info(0, mini2440_i2c_devs,
 +                              ARRAY_SIZE(mini2440_i2c_devs));
 +
 +      platform_add_devices(mini2440_devices, ARRAY_SIZE(mini2440_devices));
 +
 +      if (features.count)     /* the optional features */
 +              platform_add_devices(features.optional, features.count);
 +
 +}
 +
 +
 +MACHINE_START(MINI2440, "MINI2440")
 +      /* Maintainer: Michel Pollet <buserror@gmail.com> */
 +      .atag_offset    = 0x100,
 +      .map_io         = mini2440_map_io,
 +      .init_machine   = mini2440_init,
 +      .init_irq       = s3c24xx_init_irq,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index 40eaf844bc1f61aa92b4dd33250850025bf380e8,0000000000000000000000000000000000000000..5198e3e1c5bedb1fcf5d60820d6ffd4ef30675a1
mode 100644,000000..100644
--- /dev/null
@@@ -1,162 -1,0 +1,162 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-nexcoder.c
 + *
 + * Copyright (c) 2004 Nex Vision
 + *   Guillaume GOURAT <guillaume.gourat@nexvision.tv>
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 + * Modifications:
 + *     15-10-2004 GG  Created initial version
 + *     12-03-2005 BJD Updated for release
 + */
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/gpio.h>
 +#include <linux/string.h>
 +#include <linux/serial_core.h>
 +#include <linux/platform_device.h>
 +#include <linux/io.h>
 +
 +#include <linux/mtd/map.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <asm/setup.h>
 +#include <mach/hardware.h>
 +#include <asm/irq.h>
 +#include <asm/mach-types.h>
 +
 +//#include <asm/debug-ll.h>
 +#include <mach/regs-gpio.h>
 +#include <plat/regs-serial.h>
 +#include <plat/iic.h>
 +
 +#include <plat/gpio-cfg.h>
 +#include <plat/s3c2410.h>
 +#include <plat/s3c244x.h>
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +
 +#include "common.h"
 +
 +static struct map_desc nexcoder_iodesc[] __initdata = {
 +      /* nothing here yet */
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT
 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 +#define UFCON S3C2410_UFCON_RXTRIG12 | S3C2410_UFCON_FIFOMODE
 +
 +static struct s3c2410_uartcfg nexcoder_uartcfgs[] __initdata = {
 +      [0] = {
 +              .hwport      = 0,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +      },
 +      [1] = {
 +              .hwport      = 1,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +      },
 +      [2] = {
 +              .hwport      = 2,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +      }
 +};
 +
 +/* NOR Flash on NexVision NexCoder 2440 board */
 +
 +static struct resource nexcoder_nor_resource[] = {
 +      [0] = {
 +              .start = S3C2410_CS0,
 +              .end   = S3C2410_CS0 + (8*1024*1024) - 1,
 +              .flags = IORESOURCE_MEM,
 +      }
 +};
 +
 +static struct map_info nexcoder_nor_map = {
 +      .bankwidth = 2,
 +};
 +
 +static struct platform_device nexcoder_device_nor = {
 +      .name           = "mtd-flash",
 +      .id             = -1,
 +      .num_resources  = ARRAY_SIZE(nexcoder_nor_resource),
 +      .resource       = nexcoder_nor_resource,
 +      .dev =
 +      {
 +              .platform_data = &nexcoder_nor_map,
 +      }
 +};
 +
 +/* Standard Nexcoder devices */
 +
 +static struct platform_device *nexcoder_devices[] __initdata = {
 +      &s3c_device_ohci,
 +      &s3c_device_lcd,
 +      &s3c_device_wdt,
 +      &s3c_device_i2c0,
 +      &s3c_device_iis,
 +      &s3c_device_rtc,
 +      &s3c_device_camif,
 +      &s3c_device_spi0,
 +      &s3c_device_spi1,
 +      &nexcoder_device_nor,
 +};
 +
 +static void __init nexcoder_sensorboard_init(void)
 +{
 +      // Initialize SCCB bus
 +      s3c2410_gpio_setpin(S3C2410_GPE(14), 1); // IICSCL
 +      s3c_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPIO_OUTPUT);
 +      s3c2410_gpio_setpin(S3C2410_GPE(15), 1); // IICSDA
 +      s3c_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPIO_OUTPUT);
 +
 +      // Power up the sensor board
 +      s3c2410_gpio_setpin(S3C2410_GPF(1), 1);
 +      s3c_gpio_cfgpin(S3C2410_GPF(1), S3C2410_GPIO_OUTPUT); // CAM_GPIO7 => nLDO_PWRDN
 +      s3c2410_gpio_setpin(S3C2410_GPF(2), 0);
 +      s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); // CAM_GPIO6 => CAM_PWRDN
 +}
 +
 +static void __init nexcoder_map_io(void)
 +{
 +      s3c24xx_init_io(nexcoder_iodesc, ARRAY_SIZE(nexcoder_iodesc));
 +      s3c24xx_init_clocks(0);
 +      s3c24xx_init_uarts(nexcoder_uartcfgs, ARRAY_SIZE(nexcoder_uartcfgs));
 +
 +      nexcoder_sensorboard_init();
 +}
 +
 +static void __init nexcoder_init(void)
 +{
 +      s3c_i2c0_set_platdata(NULL);
 +      platform_add_devices(nexcoder_devices, ARRAY_SIZE(nexcoder_devices));
 +};
 +
 +MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
 +      /* Maintainer: Guillaume GOURAT <guillaume.gourat@nexvision.tv> */
 +      .atag_offset    = 0x100,
 +      .map_io         = nexcoder_map_io,
 +      .init_machine   = nexcoder_init,
 +      .init_irq       = s3c24xx_init_irq,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index 4c480ef734f64ed97d5a8953f632ceb877464147,0000000000000000000000000000000000000000..c5daeb612a88a35235c0f879e6789e0a94f0c1c1
mode 100644,000000..100644
--- /dev/null
@@@ -1,440 -1,0 +1,440 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-osiris.c
 + *
 + * Copyright (c) 2005-2008 Simtec Electronics
 + *    http://armlinux.simtec.co.uk/
 + *    Ben Dooks <ben@simtec.co.uk>
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/gpio.h>
 +#include <linux/device.h>
 +#include <linux/syscore_ops.h>
 +#include <linux/serial_core.h>
 +#include <linux/clk.h>
 +#include <linux/i2c.h>
 +#include <linux/io.h>
 +
 +#include <linux/i2c/tps65010.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <mach/osiris-map.h>
 +#include <mach/osiris-cpld.h>
 +
 +#include <mach/hardware.h>
 +#include <asm/irq.h>
 +#include <asm/mach-types.h>
 +
 +#include <plat/cpu-freq.h>
 +#include <plat/regs-serial.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-mem.h>
 +#include <mach/regs-lcd.h>
 +#include <plat/nand.h>
 +#include <plat/iic.h>
 +
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/nand.h>
 +#include <linux/mtd/nand_ecc.h>
 +#include <linux/mtd/partitions.h>
 +
 +#include <plat/gpio-cfg.h>
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +
 +#include "common.h"
 +
 +/* onboard perihperal map */
 +
 +static struct map_desc osiris_iodesc[] __initdata = {
 +  /* ISA IO areas (may be over-written later) */
 +
 +  {
 +        .virtual      = (u32)S3C24XX_VA_ISA_BYTE,
 +        .pfn          = __phys_to_pfn(S3C2410_CS5),
 +        .length       = SZ_16M,
 +        .type         = MT_DEVICE,
 +  }, {
 +        .virtual      = (u32)S3C24XX_VA_ISA_WORD,
 +        .pfn          = __phys_to_pfn(S3C2410_CS5),
 +        .length       = SZ_16M,
 +        .type         = MT_DEVICE,
 +  },
 +
 +  /* CPLD control registers */
 +
 +  {
 +        .virtual      = (u32)OSIRIS_VA_CTRL0,
 +        .pfn          = __phys_to_pfn(OSIRIS_PA_CTRL0),
 +        .length       = SZ_16K,
 +        .type         = MT_DEVICE,
 +  }, {
 +        .virtual      = (u32)OSIRIS_VA_CTRL1,
 +        .pfn          = __phys_to_pfn(OSIRIS_PA_CTRL1),
 +        .length       = SZ_16K,
 +        .type         = MT_DEVICE,
 +  }, {
 +        .virtual      = (u32)OSIRIS_VA_CTRL2,
 +        .pfn          = __phys_to_pfn(OSIRIS_PA_CTRL2),
 +        .length       = SZ_16K,
 +        .type         = MT_DEVICE,
 +  }, {
 +        .virtual      = (u32)OSIRIS_VA_IDREG,
 +        .pfn          = __phys_to_pfn(OSIRIS_PA_IDREG),
 +        .length       = SZ_16K,
 +        .type         = MT_DEVICE,
 +  },
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 +
 +static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
 +      [0] = {
 +              .hwport      = 0,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +              .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 +      },
 +      [1] = {
 +              .hwport      = 1,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +              .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 +      },
 +      [2] = {
 +              .hwport      = 2,
 +              .flags       = 0,
 +              .ucon        = UCON,
 +              .ulcon       = ULCON,
 +              .ufcon       = UFCON,
 +              .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
 +      }
 +};
 +
 +/* NAND Flash on Osiris board */
 +
 +static int external_map[]   = { 2 };
 +static int chip0_map[]      = { 0 };
 +static int chip1_map[]      = { 1 };
 +
 +static struct mtd_partition __initdata osiris_default_nand_part[] = {
 +      [0] = {
 +              .name   = "Boot Agent",
 +              .size   = SZ_16K,
 +              .offset = 0,
 +      },
 +      [1] = {
 +              .name   = "/boot",
 +              .size   = SZ_4M - SZ_16K,
 +              .offset = SZ_16K,
 +      },
 +      [2] = {
 +              .name   = "user1",
 +              .offset = SZ_4M,
 +              .size   = SZ_32M - SZ_4M,
 +      },
 +      [3] = {
 +              .name   = "user2",
 +              .offset = SZ_32M,
 +              .size   = MTDPART_SIZ_FULL,
 +      }
 +};
 +
 +static struct mtd_partition __initdata osiris_default_nand_part_large[] = {
 +      [0] = {
 +              .name   = "Boot Agent",
 +              .size   = SZ_128K,
 +              .offset = 0,
 +      },
 +      [1] = {
 +              .name   = "/boot",
 +              .size   = SZ_4M - SZ_128K,
 +              .offset = SZ_128K,
 +      },
 +      [2] = {
 +              .name   = "user1",
 +              .offset = SZ_4M,
 +              .size   = SZ_32M - SZ_4M,
 +      },
 +      [3] = {
 +              .name   = "user2",
 +              .offset = SZ_32M,
 +              .size   = MTDPART_SIZ_FULL,
 +      }
 +};
 +
 +/* the Osiris has 3 selectable slots for nand-flash, the two
 + * on-board chip areas, as well as the external slot.
 + *
 + * Note, there is no current hot-plug support for the External
 + * socket.
 +*/
 +
 +static struct s3c2410_nand_set __initdata osiris_nand_sets[] = {
 +      [1] = {
 +              .name           = "External",
 +              .nr_chips       = 1,
 +              .nr_map         = external_map,
 +              .options        = NAND_SCAN_SILENT_NODEV,
 +              .nr_partitions  = ARRAY_SIZE(osiris_default_nand_part),
 +              .partitions     = osiris_default_nand_part,
 +      },
 +      [0] = {
 +              .name           = "chip0",
 +              .nr_chips       = 1,
 +              .nr_map         = chip0_map,
 +              .nr_partitions  = ARRAY_SIZE(osiris_default_nand_part),
 +              .partitions     = osiris_default_nand_part,
 +      },
 +      [2] = {
 +              .name           = "chip1",
 +              .nr_chips       = 1,
 +              .nr_map         = chip1_map,
 +              .options        = NAND_SCAN_SILENT_NODEV,
 +              .nr_partitions  = ARRAY_SIZE(osiris_default_nand_part),
 +              .partitions     = osiris_default_nand_part,
 +      },
 +};
 +
 +static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
 +{
 +      unsigned int tmp;
 +
 +      slot = set->nr_map[slot] & 3;
 +
 +      pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
 +               slot, set, set->nr_map);
 +
 +      tmp = __raw_readb(OSIRIS_VA_CTRL0);
 +      tmp &= ~OSIRIS_CTRL0_NANDSEL;
 +      tmp |= slot;
 +
 +      pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
 +
 +      __raw_writeb(tmp, OSIRIS_VA_CTRL0);
 +}
 +
 +static struct s3c2410_platform_nand __initdata osiris_nand_info = {
 +      .tacls          = 25,
 +      .twrph0         = 60,
 +      .twrph1         = 60,
 +      .nr_sets        = ARRAY_SIZE(osiris_nand_sets),
 +      .sets           = osiris_nand_sets,
 +      .select_chip    = osiris_nand_select,
 +};
 +
 +/* PCMCIA control and configuration */
 +
 +static struct resource osiris_pcmcia_resource[] = {
 +      [0] = {
 +              .start  = 0x0f000000,
 +              .end    = 0x0f100000,
 +              .flags  = IORESOURCE_MEM,
 +      },
 +      [1] = {
 +              .start  = 0x0c000000,
 +              .end    = 0x0c100000,
 +              .flags  = IORESOURCE_MEM,
 +      }
 +};
 +
 +static struct platform_device osiris_pcmcia = {
 +      .name           = "osiris-pcmcia",
 +      .id             = -1,
 +      .num_resources  = ARRAY_SIZE(osiris_pcmcia_resource),
 +      .resource       = osiris_pcmcia_resource,
 +};
 +
 +/* Osiris power management device */
 +
 +#ifdef CONFIG_PM
 +static unsigned char pm_osiris_ctrl0;
 +
 +static int osiris_pm_suspend(void)
 +{
 +      unsigned int tmp;
 +
 +      pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
 +      tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL;
 +
 +      /* ensure correct NAND slot is selected on resume */
 +      if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0)
 +              tmp |= 2;
 +
 +      __raw_writeb(tmp, OSIRIS_VA_CTRL0);
 +
 +      /* ensure that an nRESET is not generated on resume. */
 +      s3c2410_gpio_setpin(S3C2410_GPA(21), 1);
 +      s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT);
 +
 +      return 0;
 +}
 +
 +static void osiris_pm_resume(void)
 +{
 +      if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
 +              __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
 +
 +      __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
 +
 +      s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
 +}
 +
 +#else
 +#define osiris_pm_suspend NULL
 +#define osiris_pm_resume NULL
 +#endif
 +
 +static struct syscore_ops osiris_pm_syscore_ops = {
 +      .suspend        = osiris_pm_suspend,
 +      .resume         = osiris_pm_resume,
 +};
 +
 +/* Link for DVS driver to TPS65011 */
 +
 +static void osiris_tps_release(struct device *dev)
 +{
 +      /* static device, do not need to release anything */
 +}
 +
 +static struct platform_device osiris_tps_device = {
 +      .name   = "osiris-dvs",
 +      .id     = -1,
 +      .dev.release = osiris_tps_release,
 +};
 +
 +static int osiris_tps_setup(struct i2c_client *client, void *context)
 +{
 +      osiris_tps_device.dev.parent = &client->dev;
 +      return platform_device_register(&osiris_tps_device);
 +}
 +
 +static int osiris_tps_remove(struct i2c_client *client, void *context)
 +{
 +      platform_device_unregister(&osiris_tps_device);
 +      return 0;
 +}
 +
 +static struct tps65010_board osiris_tps_board = {
 +      .base           = -1,   /* GPIO can go anywhere at the moment */
 +      .setup          = osiris_tps_setup,
 +      .teardown       = osiris_tps_remove,
 +};
 +
 +/* I2C devices fitted. */
 +
 +static struct i2c_board_info osiris_i2c_devs[] __initdata = {
 +      {
 +              I2C_BOARD_INFO("tps65011", 0x48),
 +              .irq    = IRQ_EINT20,
 +              .platform_data = &osiris_tps_board,
 +      },
 +};
 +
 +/* Standard Osiris devices */
 +
 +static struct platform_device *osiris_devices[] __initdata = {
 +      &s3c_device_i2c0,
 +      &s3c_device_wdt,
 +      &s3c_device_nand,
 +      &osiris_pcmcia,
 +};
 +
 +static struct clk *osiris_clocks[] __initdata = {
 +      &s3c24xx_dclk0,
 +      &s3c24xx_dclk1,
 +      &s3c24xx_clkout0,
 +      &s3c24xx_clkout1,
 +      &s3c24xx_uclk,
 +};
 +
 +static struct s3c_cpufreq_board __initdata osiris_cpufreq = {
 +      .refresh        = 7800, /* refresh period is 7.8usec */
 +      .auto_io        = 1,
 +      .need_io        = 1,
 +};
 +
 +static void __init osiris_map_io(void)
 +{
 +      unsigned long flags;
 +
 +      /* initialise the clocks */
 +
 +      s3c24xx_dclk0.parent = &clk_upll;
 +      s3c24xx_dclk0.rate   = 12*1000*1000;
 +
 +      s3c24xx_dclk1.parent = &clk_upll;
 +      s3c24xx_dclk1.rate   = 24*1000*1000;
 +
 +      s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
 +      s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
 +
 +      s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 +
 +      s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks));
 +
 +      s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
 +      s3c24xx_init_clocks(0);
 +      s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
 +
 +      /* check for the newer revision boards with large page nand */
 +
 +      if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) {
 +              printk(KERN_INFO "OSIRIS-B detected (revision %d)\n",
 +                     __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK);
 +              osiris_nand_sets[0].partitions = osiris_default_nand_part_large;
 +              osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
 +      } else {
 +              /* write-protect line to the NAND */
 +              s3c2410_gpio_setpin(S3C2410_GPA(0), 1);
 +      }
 +
 +      /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
 +
 +      local_irq_save(flags);
 +      __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
 +      local_irq_restore(flags);
 +}
 +
 +static void __init osiris_init(void)
 +{
 +      register_syscore_ops(&osiris_pm_syscore_ops);
 +
 +      s3c_i2c0_set_platdata(NULL);
 +      s3c_nand_set_platdata(&osiris_nand_info);
 +
 +      s3c_cpufreq_setboard(&osiris_cpufreq);
 +
 +      i2c_register_board_info(0, osiris_i2c_devs,
 +                              ARRAY_SIZE(osiris_i2c_devs));
 +
 +      platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
 +};
 +
 +MACHINE_START(OSIRIS, "Simtec-OSIRIS")
 +      /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
 +      .atag_offset    = 0x100,
 +      .map_io         = osiris_map_io,
 +      .init_irq       = s3c24xx_init_irq,
 +      .init_machine   = osiris_init,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index 4a8e2d34994c6537eb250f54168481ec50b6ac9c,0000000000000000000000000000000000000000..200debb4c72dff3eea29f6cfe2af32dda0b373b3
mode 100644,000000..100644
--- /dev/null
@@@ -1,826 -1,0 +1,826 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-rx1950.c
 + *
 + * Copyright (c) 2006-2009 Victor Chukhantsev, Denis Grigoriev,
 + * Copyright (c) 2007-2010 Vasily Khoruzhick
 + *
 + * based on smdk2440 written by Ben Dooks
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/memblock.h>
 +#include <linux/delay.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/gpio.h>
 +#include <linux/platform_device.h>
 +#include <linux/serial_core.h>
 +#include <linux/input.h>
 +#include <linux/gpio_keys.h>
 +#include <linux/device.h>
 +#include <linux/pda_power.h>
 +#include <linux/pwm_backlight.h>
 +#include <linux/pwm.h>
 +#include <linux/s3c_adc_battery.h>
 +#include <linux/leds.h>
 +#include <linux/i2c.h>
 +
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/partitions.h>
 +
 +#include <linux/mmc/host.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach-types.h>
 +
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-gpioj.h>
 +#include <mach/regs-lcd.h>
 +#include <mach/h1940.h>
 +#include <mach/fb.h>
 +
 +#include <plat/clock.h>
 +#include <plat/regs-serial.h>
 +#include <plat/regs-iic.h>
 +#include <plat/mci.h>
 +#include <plat/udc.h>
 +#include <plat/nand.h>
 +#include <plat/iic.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +#include <plat/pm.h>
 +#include <plat/irq.h>
 +#include <plat/ts.h>
 +
 +#include <sound/uda1380.h>
 +
 +#include "common.h"
 +
 +#define LCD_PWM_PERIOD 192960
 +#define LCD_PWM_DUTY 127353
 +
 +static struct map_desc rx1950_iodesc[] __initdata = {
 +};
 +
 +static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
 +      [0] = {
 +             .hwport = 0,
 +             .flags = 0,
 +             .ucon = 0x3c5,
 +             .ulcon = 0x03,
 +             .ufcon = 0x51,
 +              .clk_sel = S3C2410_UCON_CLKSEL3,
 +      },
 +      [1] = {
 +             .hwport = 1,
 +             .flags = 0,
 +             .ucon = 0x3c5,
 +             .ulcon = 0x03,
 +             .ufcon = 0x51,
 +              .clk_sel = S3C2410_UCON_CLKSEL3,
 +      },
 +      /* IR port */
 +      [2] = {
 +             .hwport = 2,
 +             .flags = 0,
 +             .ucon = 0x3c5,
 +             .ulcon = 0x43,
 +             .ufcon = 0xf1,
 +              .clk_sel = S3C2410_UCON_CLKSEL3,
 +      },
 +};
 +
 +static struct s3c2410fb_display rx1950_display = {
 +      .type = S3C2410_LCDCON1_TFT,
 +      .width = 240,
 +      .height = 320,
 +      .xres = 240,
 +      .yres = 320,
 +      .bpp = 16,
 +
 +      .pixclock = 260000,
 +      .left_margin = 10,
 +      .right_margin = 20,
 +      .hsync_len = 10,
 +      .upper_margin = 2,
 +      .lower_margin = 2,
 +      .vsync_len = 2,
 +
 +      .lcdcon5 = S3C2410_LCDCON5_FRM565 |
 +                         S3C2410_LCDCON5_INVVCLK |
 +                         S3C2410_LCDCON5_INVVLINE |
 +                         S3C2410_LCDCON5_INVVFRAME |
 +                         S3C2410_LCDCON5_HWSWP |
 +                         (0x02 << 13) |
 +                         (0x02 << 15),
 +
 +};
 +
 +static int power_supply_init(struct device *dev)
 +{
 +      return gpio_request(S3C2410_GPF(2), "cable plugged");
 +}
 +
 +static int rx1950_is_ac_online(void)
 +{
 +      return !gpio_get_value(S3C2410_GPF(2));
 +}
 +
 +static void power_supply_exit(struct device *dev)
 +{
 +      gpio_free(S3C2410_GPF(2));
 +}
 +
 +static char *rx1950_supplicants[] = {
 +      "main-battery"
 +};
 +
 +static struct pda_power_pdata power_supply_info = {
 +      .init                   = power_supply_init,
 +      .is_ac_online           = rx1950_is_ac_online,
 +      .exit                   = power_supply_exit,
 +      .supplied_to            = rx1950_supplicants,
 +      .num_supplicants        = ARRAY_SIZE(rx1950_supplicants),
 +};
 +
 +static struct resource power_supply_resources[] = {
 +      [0] = {
 +                      .name   = "ac",
 +                      .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE |
 +                                        IORESOURCE_IRQ_HIGHEDGE,
 +                      .start  = IRQ_EINT2,
 +                      .end    = IRQ_EINT2,
 +      },
 +};
 +
 +static struct platform_device power_supply = {
 +      .name                   = "pda-power",
 +      .id                     = -1,
 +      .dev                    = {
 +                                      .platform_data =
 +                                              &power_supply_info,
 +      },
 +      .resource               = power_supply_resources,
 +      .num_resources          = ARRAY_SIZE(power_supply_resources),
 +};
 +
 +static const struct s3c_adc_bat_thresh bat_lut_noac[] = {
 +      { .volt = 4100, .cur = 156, .level = 100},
 +      { .volt = 4050, .cur = 156, .level = 95},
 +      { .volt = 4025, .cur = 141, .level = 90},
 +      { .volt = 3995, .cur = 144, .level = 85},
 +      { .volt = 3957, .cur = 162, .level = 80},
 +      { .volt = 3931, .cur = 147, .level = 75},
 +      { .volt = 3902, .cur = 147, .level = 70},
 +      { .volt = 3863, .cur = 153, .level = 65},
 +      { .volt = 3838, .cur = 150, .level = 60},
 +      { .volt = 3800, .cur = 153, .level = 55},
 +      { .volt = 3765, .cur = 153, .level = 50},
 +      { .volt = 3748, .cur = 172, .level = 45},
 +      { .volt = 3740, .cur = 153, .level = 40},
 +      { .volt = 3714, .cur = 175, .level = 35},
 +      { .volt = 3710, .cur = 156, .level = 30},
 +      { .volt = 3963, .cur = 156, .level = 25},
 +      { .volt = 3672, .cur = 178, .level = 20},
 +      { .volt = 3651, .cur = 178, .level = 15},
 +      { .volt = 3629, .cur = 178, .level = 10},
 +      { .volt = 3612, .cur = 162, .level = 5},
 +      { .volt = 3605, .cur = 162, .level = 0},
 +};
 +
 +static const struct s3c_adc_bat_thresh bat_lut_acin[] = {
 +      { .volt = 4200, .cur = 0, .level = 100},
 +      { .volt = 4190, .cur = 0, .level = 99},
 +      { .volt = 4178, .cur = 0, .level = 95},
 +      { .volt = 4110, .cur = 0, .level = 70},
 +      { .volt = 4076, .cur = 0, .level = 65},
 +      { .volt = 4046, .cur = 0, .level = 60},
 +      { .volt = 4021, .cur = 0, .level = 55},
 +      { .volt = 3999, .cur = 0, .level = 50},
 +      { .volt = 3982, .cur = 0, .level = 45},
 +      { .volt = 3965, .cur = 0, .level = 40},
 +      { .volt = 3957, .cur = 0, .level = 35},
 +      { .volt = 3948, .cur = 0, .level = 30},
 +      { .volt = 3936, .cur = 0, .level = 25},
 +      { .volt = 3927, .cur = 0, .level = 20},
 +      { .volt = 3906, .cur = 0, .level = 15},
 +      { .volt = 3880, .cur = 0, .level = 10},
 +      { .volt = 3829, .cur = 0, .level = 5},
 +      { .volt = 3820, .cur = 0, .level = 0},
 +};
 +
 +static int rx1950_bat_init(void)
 +{
 +      int ret;
 +
 +      ret = gpio_request(S3C2410_GPJ(2), "rx1950-charger-enable-1");
 +      if (ret)
 +              goto err_gpio1;
 +      ret = gpio_request(S3C2410_GPJ(3), "rx1950-charger-enable-2");
 +      if (ret)
 +              goto err_gpio2;
 +
 +      return 0;
 +
 +err_gpio2:
 +      gpio_free(S3C2410_GPJ(2));
 +err_gpio1:
 +      return ret;
 +}
 +
 +static void rx1950_bat_exit(void)
 +{
 +      gpio_free(S3C2410_GPJ(2));
 +      gpio_free(S3C2410_GPJ(3));
 +}
 +
 +static void rx1950_enable_charger(void)
 +{
 +      gpio_direction_output(S3C2410_GPJ(2), 1);
 +      gpio_direction_output(S3C2410_GPJ(3), 1);
 +}
 +
 +static void rx1950_disable_charger(void)
 +{
 +      gpio_direction_output(S3C2410_GPJ(2), 0);
 +      gpio_direction_output(S3C2410_GPJ(3), 0);
 +}
 +
 +static DEFINE_SPINLOCK(rx1950_blink_spin);
 +
 +static int rx1950_led_blink_set(unsigned gpio, int state,
 +      unsigned long *delay_on, unsigned long *delay_off)
 +{
 +      int blink_gpio, check_gpio;
 +
 +      switch (gpio) {
 +      case S3C2410_GPA(6):
 +              blink_gpio = S3C2410_GPA(4);
 +              check_gpio = S3C2410_GPA(3);
 +              break;
 +      case S3C2410_GPA(7):
 +              blink_gpio = S3C2410_GPA(3);
 +              check_gpio = S3C2410_GPA(4);
 +              break;
 +      default:
 +              return -EINVAL;
 +              break;
 +      }
 +
 +      if (delay_on && delay_off && !*delay_on && !*delay_off)
 +              *delay_on = *delay_off = 500;
 +
 +      spin_lock(&rx1950_blink_spin);
 +
 +      switch (state) {
 +      case GPIO_LED_NO_BLINK_LOW:
 +      case GPIO_LED_NO_BLINK_HIGH:
 +              if (!gpio_get_value(check_gpio))
 +                      gpio_set_value(S3C2410_GPJ(6), 0);
 +              gpio_set_value(blink_gpio, 0);
 +              gpio_set_value(gpio, state);
 +              break;
 +      case GPIO_LED_BLINK:
 +              gpio_set_value(gpio, 0);
 +              gpio_set_value(S3C2410_GPJ(6), 1);
 +              gpio_set_value(blink_gpio, 1);
 +              break;
 +      }
 +
 +      spin_unlock(&rx1950_blink_spin);
 +
 +      return 0;
 +}
 +
 +static struct gpio_led rx1950_leds_desc[] = {
 +      {
 +              .name                   = "Green",
 +              .default_trigger        = "main-battery-full",
 +              .gpio                   = S3C2410_GPA(6),
 +              .retain_state_suspended = 1,
 +      },
 +      {
 +              .name                   = "Red",
 +              .default_trigger
 +                      = "main-battery-charging-blink-full-solid",
 +              .gpio                   = S3C2410_GPA(7),
 +              .retain_state_suspended = 1,
 +      },
 +      {
 +              .name                   = "Blue",
 +              .default_trigger        = "rx1950-acx-mem",
 +              .gpio                   = S3C2410_GPA(11),
 +              .retain_state_suspended = 1,
 +      },
 +};
 +
 +static struct gpio_led_platform_data rx1950_leds_pdata = {
 +      .num_leds       = ARRAY_SIZE(rx1950_leds_desc),
 +      .leds           = rx1950_leds_desc,
 +      .gpio_blink_set = rx1950_led_blink_set,
 +};
 +
 +static struct platform_device rx1950_leds = {
 +      .name   = "leds-gpio",
 +      .id             = -1,
 +      .dev    = {
 +                              .platform_data = &rx1950_leds_pdata,
 +      },
 +};
 +
 +static struct s3c_adc_bat_pdata rx1950_bat_cfg = {
 +      .init = rx1950_bat_init,
 +      .exit = rx1950_bat_exit,
 +      .enable_charger = rx1950_enable_charger,
 +      .disable_charger = rx1950_disable_charger,
 +      .gpio_charge_finished = S3C2410_GPF(3),
 +      .lut_noac = bat_lut_noac,
 +      .lut_noac_cnt = ARRAY_SIZE(bat_lut_noac),
 +      .lut_acin = bat_lut_acin,
 +      .lut_acin_cnt = ARRAY_SIZE(bat_lut_acin),
 +      .volt_channel = 0,
 +      .current_channel = 1,
 +      .volt_mult = 4235,
 +      .current_mult = 2900,
 +      .internal_impedance = 200,
 +};
 +
 +static struct platform_device rx1950_battery = {
 +      .name             = "s3c-adc-battery",
 +      .id               = -1,
 +      .dev = {
 +              .parent = &s3c_device_adc.dev,
 +              .platform_data = &rx1950_bat_cfg,
 +      },
 +};
 +
 +static struct s3c2410fb_mach_info rx1950_lcd_cfg = {
 +      .displays = &rx1950_display,
 +      .num_displays = 1,
 +      .default_display = 0,
 +
 +      .lpcsel = 0x02,
 +      .gpccon = 0xaa9556a9,
 +      .gpccon_mask = 0xffc003fc,
 +      .gpcup = 0x0000ffff,
 +      .gpcup_mask = 0xffffffff,
 +
 +      .gpdcon = 0xaa90aaa1,
 +      .gpdcon_mask = 0xffc0fff0,
 +      .gpdup = 0x0000fcfd,
 +      .gpdup_mask = 0xffffffff,
 +
 +};
 +
 +static struct pwm_device *lcd_pwm;
 +
 +static void rx1950_lcd_power(int enable)
 +{
 +      int i;
 +      static int enabled;
 +      if (enabled == enable)
 +              return;
 +      if (!enable) {
 +
 +              /* GPC11-GPC15->OUTPUT */
 +              for (i = 11; i < 16; i++)
 +                      gpio_direction_output(S3C2410_GPC(i), 1);
 +
 +              /* Wait a bit here... */
 +              mdelay(100);
 +
 +              /* GPD2-GPD7->OUTPUT */
 +              /* GPD11-GPD15->OUTPUT */
 +              /* GPD2-GPD7->1, GPD11-GPD15->1 */
 +              for (i = 2; i < 8; i++)
 +                      gpio_direction_output(S3C2410_GPD(i), 1);
 +              for (i = 11; i < 16; i++)
 +                      gpio_direction_output(S3C2410_GPD(i), 1);
 +
 +              /* Wait a bit here...*/
 +              mdelay(100);
 +
 +              /* GPB0->OUTPUT, GPB0->0 */
 +              gpio_direction_output(S3C2410_GPB(0), 0);
 +
 +              /* GPC1-GPC4->OUTPUT, GPC1-4->0 */
 +              for (i = 1; i < 5; i++)
 +                      gpio_direction_output(S3C2410_GPC(i), 0);
 +
 +              /* GPC15-GPC11->0 */
 +              for (i = 11; i < 16; i++)
 +                      gpio_direction_output(S3C2410_GPC(i), 0);
 +
 +              /* GPD15-GPD11->0, GPD2->GPD7->0 */
 +              for (i = 11; i < 16; i++)
 +                      gpio_direction_output(S3C2410_GPD(i), 0);
 +
 +              for (i = 2; i < 8; i++)
 +                      gpio_direction_output(S3C2410_GPD(i), 0);
 +
 +              /* GPC6->0, GPC7->0, GPC5->0 */
 +              gpio_direction_output(S3C2410_GPC(6), 0);
 +              gpio_direction_output(S3C2410_GPC(7), 0);
 +              gpio_direction_output(S3C2410_GPC(5), 0);
 +
 +              /* GPB1->OUTPUT, GPB1->0 */
 +              gpio_direction_output(S3C2410_GPB(1), 0);
 +              pwm_config(lcd_pwm, 0, LCD_PWM_PERIOD);
 +              pwm_disable(lcd_pwm);
 +
 +              /* GPC0->0, GPC10->0 */
 +              gpio_direction_output(S3C2410_GPC(0), 0);
 +              gpio_direction_output(S3C2410_GPC(10), 0);
 +      } else {
 +              pwm_config(lcd_pwm, LCD_PWM_DUTY, LCD_PWM_PERIOD);
 +              pwm_enable(lcd_pwm);
 +
 +              gpio_direction_output(S3C2410_GPC(0), 1);
 +              gpio_direction_output(S3C2410_GPC(5), 1);
 +
 +              s3c_gpio_cfgpin(S3C2410_GPB(1), S3C2410_GPB1_TOUT1);
 +              gpio_direction_output(S3C2410_GPC(7), 1);
 +
 +              for (i = 1; i < 5; i++)
 +                      s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2));
 +
 +              for (i = 11; i < 16; i++)
 +                      s3c_gpio_cfgpin(S3C2410_GPC(i), S3C_GPIO_SFN(2));
 +
 +              for (i = 2; i < 8; i++)
 +                      s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2));
 +
 +              for (i = 11; i < 16; i++)
 +                      s3c_gpio_cfgpin(S3C2410_GPD(i), S3C_GPIO_SFN(2));
 +
 +              gpio_direction_output(S3C2410_GPC(10), 1);
 +              gpio_direction_output(S3C2410_GPC(6), 1);
 +      }
 +      enabled = enable;
 +}
 +
 +static void rx1950_bl_power(int enable)
 +{
 +      static int enabled;
 +      if (enabled == enable)
 +              return;
 +      if (!enable) {
 +                      gpio_direction_output(S3C2410_GPB(0), 0);
 +      } else {
 +                      /* LED driver need a "push" to power on */
 +                      gpio_direction_output(S3C2410_GPB(0), 1);
 +                      /* Warm up backlight for one period of PWM.
 +                       * Without this trick its almost impossible to
 +                       * enable backlight with low brightness value
 +                       */
 +                      ndelay(48000);
 +                      s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0);
 +      }
 +      enabled = enable;
 +}
 +
 +static int rx1950_backlight_init(struct device *dev)
 +{
 +      WARN_ON(gpio_request(S3C2410_GPB(0), "Backlight"));
 +      lcd_pwm = pwm_request(1, "RX1950 LCD");
 +      if (IS_ERR(lcd_pwm)) {
 +              dev_err(dev, "Unable to request PWM for LCD power!\n");
 +              return PTR_ERR(lcd_pwm);
 +      }
 +
 +      rx1950_lcd_power(1);
 +      rx1950_bl_power(1);
 +
 +      return 0;
 +}
 +
 +static void rx1950_backlight_exit(struct device *dev)
 +{
 +      rx1950_bl_power(0);
 +      rx1950_lcd_power(0);
 +
 +      pwm_free(lcd_pwm);
 +      gpio_free(S3C2410_GPB(0));
 +}
 +
 +
 +static int rx1950_backlight_notify(struct device *dev, int brightness)
 +{
 +      if (!brightness) {
 +              rx1950_bl_power(0);
 +              rx1950_lcd_power(0);
 +      } else {
 +              rx1950_lcd_power(1);
 +              rx1950_bl_power(1);
 +      }
 +      return brightness;
 +}
 +
 +static struct platform_pwm_backlight_data rx1950_backlight_data = {
 +      .pwm_id = 0,
 +      .max_brightness = 24,
 +      .dft_brightness = 4,
 +      .pwm_period_ns = 48000,
 +      .init = rx1950_backlight_init,
 +      .notify = rx1950_backlight_notify,
 +      .exit = rx1950_backlight_exit,
 +};
 +
 +static struct platform_device rx1950_backlight = {
 +      .name = "pwm-backlight",
 +      .dev = {
 +              .parent = &s3c_device_timer[0].dev,
 +              .platform_data = &rx1950_backlight_data,
 +      },
 +};
 +
 +static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd)
 +{
 +      switch (power_mode) {
 +      case MMC_POWER_OFF:
 +              gpio_direction_output(S3C2410_GPJ(1), 0);
 +              break;
 +      case MMC_POWER_UP:
 +      case MMC_POWER_ON:
 +              gpio_direction_output(S3C2410_GPJ(1), 1);
 +              break;
 +      default:
 +              break;
 +      }
 +}
 +
 +static struct s3c24xx_mci_pdata rx1950_mmc_cfg __initdata = {
 +      .gpio_detect = S3C2410_GPF(5),
 +      .gpio_wprotect = S3C2410_GPH(8),
 +      .set_power = rx1950_set_mmc_power,
 +      .ocr_avail = MMC_VDD_32_33,
 +};
 +
 +static struct mtd_partition rx1950_nand_part[] = {
 +      [0] = {
 +                      .name = "Boot0",
 +                      .offset = 0,
 +                      .size = 0x4000,
 +                      .mask_flags = MTD_WRITEABLE,
 +      },
 +      [1] = {
 +                      .name = "Boot1",
 +                      .offset = MTDPART_OFS_APPEND,
 +                      .size = 0x40000,
 +                      .mask_flags = MTD_WRITEABLE,
 +      },
 +      [2] = {
 +                      .name = "Kernel",
 +                      .offset = MTDPART_OFS_APPEND,
 +                      .size = 0x300000,
 +                      .mask_flags = 0,
 +      },
 +      [3] = {
 +                      .name = "Filesystem",
 +                      .offset = MTDPART_OFS_APPEND,
 +                      .size = MTDPART_SIZ_FULL,
 +                      .mask_flags = 0,
 +      },
 +};
 +
 +static struct s3c2410_nand_set rx1950_nand_sets[] = {
 +      [0] = {
 +                      .name = "Internal",
 +                      .nr_chips = 1,
 +                      .nr_partitions = ARRAY_SIZE(rx1950_nand_part),
 +                      .partitions = rx1950_nand_part,
 +      },
 +};
 +
 +static struct s3c2410_platform_nand rx1950_nand_info = {
 +      .tacls = 25,
 +      .twrph0 = 50,
 +      .twrph1 = 15,
 +      .nr_sets = ARRAY_SIZE(rx1950_nand_sets),
 +      .sets = rx1950_nand_sets,
 +};
 +
 +static struct s3c2410_udc_mach_info rx1950_udc_cfg __initdata = {
 +      .vbus_pin = S3C2410_GPG(5),
 +      .vbus_pin_inverted = 1,
 +      .pullup_pin = S3C2410_GPJ(5),
 +};
 +
 +static struct s3c2410_ts_mach_info rx1950_ts_cfg __initdata = {
 +      .delay = 10000,
 +      .presc = 49,
 +      .oversampling_shift = 3,
 +};
 +
 +static struct gpio_keys_button rx1950_gpio_keys_table[] = {
 +      {
 +              .code           = KEY_POWER,
 +              .gpio           = S3C2410_GPF(0),
 +              .active_low     = 1,
 +              .desc           = "Power button",
 +              .wakeup         = 1,
 +      },
 +      {
 +              .code           = KEY_F5,
 +              .gpio           = S3C2410_GPF(7),
 +              .active_low     = 1,
 +              .desc           = "Record button",
 +      },
 +      {
 +              .code           = KEY_F1,
 +              .gpio           = S3C2410_GPG(0),
 +              .active_low     = 1,
 +              .desc           = "Calendar button",
 +      },
 +      {
 +              .code           = KEY_F2,
 +              .gpio           = S3C2410_GPG(2),
 +              .active_low     = 1,
 +              .desc           = "Contacts button",
 +      },
 +      {
 +              .code           = KEY_F3,
 +              .gpio           = S3C2410_GPG(3),
 +              .active_low     = 1,
 +              .desc           = "Mail button",
 +      },
 +      {
 +              .code           = KEY_F4,
 +              .gpio           = S3C2410_GPG(7),
 +              .active_low     = 1,
 +              .desc           = "WLAN button",
 +      },
 +      {
 +              .code           = KEY_LEFT,
 +              .gpio           = S3C2410_GPG(10),
 +              .active_low     = 1,
 +              .desc           = "Left button",
 +      },
 +      {
 +              .code           = KEY_RIGHT,
 +              .gpio           = S3C2410_GPG(11),
 +              .active_low     = 1,
 +              .desc           = "Right button",
 +      },
 +      {
 +              .code           = KEY_UP,
 +              .gpio           = S3C2410_GPG(4),
 +              .active_low     = 1,
 +              .desc           = "Up button",
 +      },
 +      {
 +              .code           = KEY_DOWN,
 +              .gpio           = S3C2410_GPG(6),
 +              .active_low     = 1,
 +              .desc           = "Down button",
 +      },
 +      {
 +              .code           = KEY_ENTER,
 +              .gpio           = S3C2410_GPG(9),
 +              .active_low     = 1,
 +              .desc           = "Ok button"
 +      },
 +};
 +
 +static struct gpio_keys_platform_data rx1950_gpio_keys_data = {
 +      .buttons = rx1950_gpio_keys_table,
 +      .nbuttons = ARRAY_SIZE(rx1950_gpio_keys_table),
 +};
 +
 +static struct platform_device rx1950_device_gpiokeys = {
 +      .name = "gpio-keys",
 +      .dev.platform_data = &rx1950_gpio_keys_data,
 +};
 +
 +static struct uda1380_platform_data uda1380_info = {
 +      .gpio_power     = S3C2410_GPJ(0),
 +      .gpio_reset     = S3C2410_GPD(0),
 +      .dac_clk        = UDA1380_DAC_CLK_SYSCLK,
 +};
 +
 +static struct i2c_board_info rx1950_i2c_devices[] = {
 +      {
 +              I2C_BOARD_INFO("uda1380", 0x1a),
 +              .platform_data = &uda1380_info,
 +      },
 +};
 +
 +static struct platform_device *rx1950_devices[] __initdata = {
 +      &s3c_device_lcd,
 +      &s3c_device_wdt,
 +      &s3c_device_i2c0,
 +      &s3c_device_iis,
 +      &samsung_asoc_dma,
 +      &s3c_device_usbgadget,
 +      &s3c_device_rtc,
 +      &s3c_device_nand,
 +      &s3c_device_sdi,
 +      &s3c_device_adc,
 +      &s3c_device_ts,
 +      &s3c_device_timer[0],
 +      &s3c_device_timer[1],
 +      &rx1950_backlight,
 +      &rx1950_device_gpiokeys,
 +      &power_supply,
 +      &rx1950_battery,
 +      &rx1950_leds,
 +};
 +
 +static struct clk *rx1950_clocks[] __initdata = {
 +      &s3c24xx_clkout0,
 +      &s3c24xx_clkout1,
 +};
 +
 +static void __init rx1950_map_io(void)
 +{
 +      s3c24xx_clkout0.parent  = &clk_h;
 +      s3c24xx_clkout1.parent  = &clk_f;
 +
 +      s3c24xx_register_clocks(rx1950_clocks, ARRAY_SIZE(rx1950_clocks));
 +
 +      s3c24xx_init_io(rx1950_iodesc, ARRAY_SIZE(rx1950_iodesc));
 +      s3c24xx_init_clocks(16934000);
 +      s3c24xx_init_uarts(rx1950_uartcfgs, ARRAY_SIZE(rx1950_uartcfgs));
 +
 +      /* setup PM */
 +
 +#ifdef CONFIG_PM_H1940
 +      memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 8);
 +#endif
 +
 +      s3c_pm_init();
 +}
 +
 +static void __init rx1950_init_machine(void)
 +{
 +      int i;
 +
 +      s3c24xx_fb_set_platdata(&rx1950_lcd_cfg);
 +      s3c24xx_udc_set_platdata(&rx1950_udc_cfg);
 +      s3c24xx_ts_set_platdata(&rx1950_ts_cfg);
 +      s3c24xx_mci_set_platdata(&rx1950_mmc_cfg);
 +      s3c_i2c0_set_platdata(NULL);
 +      s3c_nand_set_platdata(&rx1950_nand_info);
 +
 +      /* Turn off suspend on both USB ports, and switch the
 +       * selectable USB port to USB device mode. */
 +      s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST |
 +                                              S3C2410_MISCCR_USBSUSPND0 |
 +                                              S3C2410_MISCCR_USBSUSPND1, 0x0);
 +
 +      /* mmc power is disabled by default */
 +      WARN_ON(gpio_request(S3C2410_GPJ(1), "MMC power"));
 +      gpio_direction_output(S3C2410_GPJ(1), 0);
 +
 +      for (i = 0; i < 8; i++)
 +              WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power"));
 +
 +      for (i = 10; i < 16; i++)
 +              WARN_ON(gpio_request(S3C2410_GPC(i), "LCD power"));
 +
 +      for (i = 2; i < 8; i++)
 +              WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power"));
 +
 +      for (i = 11; i < 16; i++)
 +              WARN_ON(gpio_request(S3C2410_GPD(i), "LCD power"));
 +
 +      WARN_ON(gpio_request(S3C2410_GPB(1), "LCD power"));
 +
 +      WARN_ON(gpio_request(S3C2410_GPA(3), "Red blink"));
 +      WARN_ON(gpio_request(S3C2410_GPA(4), "Green blink"));
 +      WARN_ON(gpio_request(S3C2410_GPJ(6), "LED blink"));
 +      gpio_direction_output(S3C2410_GPA(3), 0);
 +      gpio_direction_output(S3C2410_GPA(4), 0);
 +      gpio_direction_output(S3C2410_GPJ(6), 0);
 +
 +      platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices));
 +
 +      i2c_register_board_info(0, rx1950_i2c_devices,
 +              ARRAY_SIZE(rx1950_i2c_devices));
 +}
 +
 +/* H1940 and RX3715 need to reserve this for suspend */
 +static void __init rx1950_reserve(void)
 +{
 +      memblock_reserve(0x30003000, 0x1000);
 +      memblock_reserve(0x30081000, 0x1000);
 +}
 +
 +MACHINE_START(RX1950, "HP iPAQ RX1950")
 +    /* Maintainers: Vasily Khoruzhick */
 +      .atag_offset = 0x100,
 +      .map_io = rx1950_map_io,
 +      .reserve        = rx1950_reserve,
 +      .init_irq = s3c24xx_init_irq,
 +      .init_machine = rx1950_init_machine,
 +      .timer = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index 20103bafbd4bfa34b2e6d58e14b0d10d4486b3cd,0000000000000000000000000000000000000000..56af354475984edf7af488359991fb6041baef9b
mode 100644,000000..100644
--- /dev/null
@@@ -1,217 -1,0 +1,217 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-rx3715.c
 + *
 + * Copyright (c) 2003-2004 Simtec Electronics
 + *    Ben Dooks <ben@simtec.co.uk>
 + *
 + * http://www.handhelds.org/projects/rx3715.html
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/memblock.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/tty.h>
 +#include <linux/console.h>
 +#include <linux/device.h>
 +#include <linux/platform_device.h>
 +#include <linux/serial_core.h>
 +#include <linux/serial.h>
 +#include <linux/io.h>
 +#include <linux/mtd/mtd.h>
 +#include <linux/mtd/nand.h>
 +#include <linux/mtd/nand_ecc.h>
 +#include <linux/mtd/partitions.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <mach/hardware.h>
 +#include <asm/irq.h>
 +#include <asm/mach-types.h>
 +
 +#include <plat/regs-serial.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-lcd.h>
 +
 +#include <mach/h1940.h>
 +#include <plat/nand.h>
 +#include <mach/fb.h>
 +
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +#include <plat/pm.h>
 +
 +#include "common.h"
 +
 +static struct map_desc rx3715_iodesc[] __initdata = {
 +      /* dump ISA space somewhere unused */
 +
 +      {
 +              .virtual        = (u32)S3C24XX_VA_ISA_WORD,
 +              .pfn            = __phys_to_pfn(S3C2410_CS3),
 +              .length         = SZ_1M,
 +              .type           = MT_DEVICE,
 +      }, {
 +              .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
 +              .pfn            = __phys_to_pfn(S3C2410_CS3),
 +              .length         = SZ_1M,
 +              .type           = MT_DEVICE,
 +      },
 +};
 +
 +static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
 +      [0] = {
 +              .hwport      = 0,
 +              .flags       = 0,
 +              .ucon        = 0x3c5,
 +              .ulcon       = 0x03,
 +              .ufcon       = 0x51,
 +              .clk_sel        = S3C2410_UCON_CLKSEL3,
 +      },
 +      [1] = {
 +              .hwport      = 1,
 +              .flags       = 0,
 +              .ucon        = 0x3c5,
 +              .ulcon       = 0x03,
 +              .ufcon       = 0x00,
 +              .clk_sel        = S3C2410_UCON_CLKSEL3,
 +      },
 +      /* IR port */
 +      [2] = {
 +              .hwport      = 2,
 +              .uart_flags  = UPF_CONS_FLOW,
 +              .ucon        = 0x3c5,
 +              .ulcon       = 0x43,
 +              .ufcon       = 0x51,
 +              .clk_sel        = S3C2410_UCON_CLKSEL3,
 +      }
 +};
 +
 +/* framebuffer lcd controller information */
 +
 +static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
 +      .lcdcon5 =      S3C2410_LCDCON5_INVVLINE |
 +                      S3C2410_LCDCON5_FRM565 |
 +                      S3C2410_LCDCON5_HWSWP,
 +
 +      .type           = S3C2410_LCDCON1_TFT,
 +      .width          = 240,
 +      .height         = 320,
 +
 +      .pixclock       = 260000,
 +      .xres           = 240,
 +      .yres           = 320,
 +      .bpp            = 16,
 +      .left_margin    = 36,
 +      .right_margin   = 36,
 +      .hsync_len      = 8,
 +      .upper_margin   = 6,
 +      .lower_margin   = 7,
 +      .vsync_len      = 3,
 +};
 +
 +static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
 +
 +      .displays =     &rx3715_lcdcfg,
 +      .num_displays = 1,
 +      .default_display = 0,
 +
 +      .lpcsel =       0xf82,
 +
 +      .gpccon =       0xaa955699,
 +      .gpccon_mask =  0xffc003cc,
 +      .gpcup =        0x0000ffff,
 +      .gpcup_mask =   0xffffffff,
 +
 +      .gpdcon =       0xaa95aaa1,
 +      .gpdcon_mask =  0xffc0fff0,
 +      .gpdup =        0x0000faff,
 +      .gpdup_mask =   0xffffffff,
 +};
 +
 +static struct mtd_partition __initdata rx3715_nand_part[] = {
 +      [0] = {
 +              .name           = "Whole Flash",
 +              .offset         = 0,
 +              .size           = MTDPART_SIZ_FULL,
 +              .mask_flags     = MTD_WRITEABLE,
 +      }
 +};
 +
 +static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
 +      [0] = {
 +              .name           = "Internal",
 +              .nr_chips       = 1,
 +              .nr_partitions  = ARRAY_SIZE(rx3715_nand_part),
 +              .partitions     = rx3715_nand_part,
 +      },
 +};
 +
 +static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
 +      .tacls          = 25,
 +      .twrph0         = 50,
 +      .twrph1         = 15,
 +      .nr_sets        = ARRAY_SIZE(rx3715_nand_sets),
 +      .sets           = rx3715_nand_sets,
 +};
 +
 +static struct platform_device *rx3715_devices[] __initdata = {
 +      &s3c_device_ohci,
 +      &s3c_device_lcd,
 +      &s3c_device_wdt,
 +      &s3c_device_i2c0,
 +      &s3c_device_iis,
 +      &s3c_device_nand,
 +};
 +
 +static void __init rx3715_map_io(void)
 +{
 +      s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
 +      s3c24xx_init_clocks(16934000);
 +      s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
 +}
 +
 +/* H1940 and RX3715 need to reserve this for suspend */
 +static void __init rx3715_reserve(void)
 +{
 +      memblock_reserve(0x30003000, 0x1000);
 +      memblock_reserve(0x30081000, 0x1000);
 +}
 +
 +static void __init rx3715_init_irq(void)
 +{
 +      s3c24xx_init_irq();
 +}
 +
 +static void __init rx3715_init_machine(void)
 +{
 +#ifdef CONFIG_PM_H1940
 +      memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
 +#endif
 +      s3c_pm_init();
 +
 +      s3c_nand_set_platdata(&rx3715_nand_info);
 +      s3c24xx_fb_set_platdata(&rx3715_fb_info);
 +      platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
 +}
 +
 +MACHINE_START(RX3715, "IPAQ-RX3715")
 +      /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 +      .atag_offset    = 0x100,
 +      .map_io         = rx3715_map_io,
 +      .reserve        = rx3715_reserve,
 +      .init_irq       = rx3715_init_irq,
 +      .init_machine   = rx3715_init_machine,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index 1deb60d12a60612284c3e1c0e6c141f5509dd9e4,0000000000000000000000000000000000000000..83a1036d7dcbe5a7d329ba1f12856ccf4d657795
mode 100644,000000..100644
--- /dev/null
@@@ -1,187 -1,0 +1,187 @@@
-       .restart        = s3c2440_restart,
 +/* linux/arch/arm/mach-s3c2440/mach-smdk2440.c
 + *
 + * Copyright (c) 2004-2005 Simtec Electronics
 + *    Ben Dooks <ben@simtec.co.uk>
 + *
 + * http://www.fluff.org/ben/smdk2440/
 + *
 + * Thanks to Dimity Andric and TomTom for the loan of an SMDK2440.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + *
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/serial_core.h>
 +#include <linux/platform_device.h>
 +#include <linux/io.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <mach/hardware.h>
 +#include <asm/irq.h>
 +#include <asm/mach-types.h>
 +
 +#include <plat/regs-serial.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-lcd.h>
 +
 +#include <mach/idle.h>
 +#include <mach/fb.h>
 +#include <plat/iic.h>
 +
 +#include <plat/s3c2410.h>
 +#include <plat/s3c244x.h>
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +
 +#include <plat/common-smdk.h>
 +
 +#include "common.h"
 +
 +static struct map_desc smdk2440_iodesc[] __initdata = {
 +      /* ISA IO Space map (memory space selected by A24) */
 +
 +      {
 +              .virtual        = (u32)S3C24XX_VA_ISA_WORD,
 +              .pfn            = __phys_to_pfn(S3C2410_CS2),
 +              .length         = 0x10000,
 +              .type           = MT_DEVICE,
 +      }, {
 +              .virtual        = (u32)S3C24XX_VA_ISA_WORD + 0x10000,
 +              .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
 +              .length         = SZ_4M,
 +              .type           = MT_DEVICE,
 +      }, {
 +              .virtual        = (u32)S3C24XX_VA_ISA_BYTE,
 +              .pfn            = __phys_to_pfn(S3C2410_CS2),
 +              .length         = 0x10000,
 +              .type           = MT_DEVICE,
 +      }, {
 +              .virtual        = (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
 +              .pfn            = __phys_to_pfn(S3C2410_CS2 + (1<<24)),
 +              .length         = SZ_4M,
 +              .type           = MT_DEVICE,
 +      }
 +};
 +
 +#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 +
 +static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
 +      [0] = {
 +              .hwport      = 0,
 +              .flags       = 0,
 +              .ucon        = 0x3c5,
 +              .ulcon       = 0x03,
 +              .ufcon       = 0x51,
 +      },
 +      [1] = {
 +              .hwport      = 1,
 +              .flags       = 0,
 +              .ucon        = 0x3c5,
 +              .ulcon       = 0x03,
 +              .ufcon       = 0x51,
 +      },
 +      /* IR port */
 +      [2] = {
 +              .hwport      = 2,
 +              .flags       = 0,
 +              .ucon        = 0x3c5,
 +              .ulcon       = 0x43,
 +              .ufcon       = 0x51,
 +      }
 +};
 +
 +/* LCD driver info */
 +
 +static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
 +
 +      .lcdcon5        = S3C2410_LCDCON5_FRM565 |
 +                        S3C2410_LCDCON5_INVVLINE |
 +                        S3C2410_LCDCON5_INVVFRAME |
 +                        S3C2410_LCDCON5_PWREN |
 +                        S3C2410_LCDCON5_HWSWP,
 +
 +      .type           = S3C2410_LCDCON1_TFT,
 +
 +      .width          = 240,
 +      .height         = 320,
 +
 +      .pixclock       = 166667, /* HCLK 60 MHz, divisor 10 */
 +      .xres           = 240,
 +      .yres           = 320,
 +      .bpp            = 16,
 +      .left_margin    = 20,
 +      .right_margin   = 8,
 +      .hsync_len      = 4,
 +      .upper_margin   = 8,
 +      .lower_margin   = 7,
 +      .vsync_len      = 4,
 +};
 +
 +static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
 +      .displays       = &smdk2440_lcd_cfg,
 +      .num_displays   = 1,
 +      .default_display = 0,
 +
 +#if 0
 +      /* currently setup by downloader */
 +      .gpccon         = 0xaa940659,
 +      .gpccon_mask    = 0xffffffff,
 +      .gpcup          = 0x0000ffff,
 +      .gpcup_mask     = 0xffffffff,
 +      .gpdcon         = 0xaa84aaa0,
 +      .gpdcon_mask    = 0xffffffff,
 +      .gpdup          = 0x0000faff,
 +      .gpdup_mask     = 0xffffffff,
 +#endif
 +
 +      .lpcsel         = ((0xCE6) & ~7) | 1<<4,
 +};
 +
 +static struct platform_device *smdk2440_devices[] __initdata = {
 +      &s3c_device_ohci,
 +      &s3c_device_lcd,
 +      &s3c_device_wdt,
 +      &s3c_device_i2c0,
 +      &s3c_device_iis,
 +};
 +
 +static void __init smdk2440_map_io(void)
 +{
 +      s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc));
 +      s3c24xx_init_clocks(16934400);
 +      s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs));
 +}
 +
 +static void __init smdk2440_machine_init(void)
 +{
 +      s3c24xx_fb_set_platdata(&smdk2440_fb_info);
 +      s3c_i2c0_set_platdata(NULL);
 +
 +      platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices));
 +      smdk_machine_init();
 +}
 +
 +MACHINE_START(S3C2440, "SMDK2440")
 +      /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
 +      .atag_offset    = 0x100,
 +
 +      .init_irq       = s3c24xx_init_irq,
 +      .map_io         = smdk2440_map_io,
 +      .init_machine   = smdk2440_machine_init,
 +      .timer          = &s3c24xx_timer,
++      .restart        = s3c244x_restart,
 +MACHINE_END
index 517623a09fc5464f9c7209baa7ef3d8e0aa9fcce,0000000000000000000000000000000000000000..2b3dddb49af75939d397d1f395cf2cc068ded504
mode 100644,000000..100644
--- /dev/null
@@@ -1,88 -1,0 +1,75 @@@
- #include <plat/watchdog-reset.h>
 +/* linux/arch/arm/mach-s3c2440/s3c2440.c
 + *
 + * Copyright (c) 2004-2006 Simtec Electronics
 + *   Ben Dooks <ben@simtec.co.uk>
 + *
 + * Samsung S3C2440 Mobile CPU support
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/platform_device.h>
 +#include <linux/serial_core.h>
 +#include <linux/device.h>
 +#include <linux/syscore_ops.h>
 +#include <linux/gpio.h>
 +#include <linux/clk.h>
 +#include <linux/io.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <mach/hardware.h>
 +#include <asm/irq.h>
 +
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +#include <plat/s3c244x.h>
 +#include <plat/pm.h>
- void s3c2440_restart(char mode, const char *cmd)
- {
-       if (mode == 's') {
-               soft_restart(0);
-       }
-       arch_wdt_reset();
-       /* we'll take a jump through zero as a poor second */
-       soft_restart(0);
- }
 +
 +#include <plat/gpio-core.h>
 +#include <plat/gpio-cfg.h>
 +#include <plat/gpio-cfg-helpers.h>
 +
 +static struct device s3c2440_dev = {
 +      .bus            = &s3c2440_subsys,
 +};
 +
 +int __init s3c2440_init(void)
 +{
 +      printk("S3C2440: Initialising architecture\n");
 +
 +      /* change irq for watchdog */
 +
 +      s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
 +      s3c_device_wdt.resource[1].end   = IRQ_S3C2440_WDT;
 +
 +      /* register suspend/resume handlers */
 +
 +#ifdef CONFIG_PM
 +      register_syscore_ops(&s3c2410_pm_syscore_ops);
 +#endif
 +      register_syscore_ops(&s3c244x_pm_syscore_ops);
 +      register_syscore_ops(&s3c24xx_irq_syscore_ops);
 +
 +      /* register our system device for everything else */
 +
 +      return device_register(&s3c2440_dev);
 +}
 +
 +void __init s3c2440_map_io(void)
 +{
 +      s3c244x_map_io();
 +
 +      s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
 +      s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
 +}
index 36bc60f61d0a46b9dfa9d74fd4a91d5be0425485,0000000000000000000000000000000000000000..d15852f642b7db8ca5fe5169a36a02fe29eb067a
mode 100644,000000..100644
--- /dev/null
@@@ -1,198 -1,0 +1,210 @@@
 +/* linux/arch/arm/plat-s3c24xx/s3c244x.c
 + *
 + * Copyright (c) 2004-2006 Simtec Electronics
 + *   Ben Dooks <ben@simtec.co.uk>
 + *
 + * Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 +*/
 +
 +#include <linux/kernel.h>
 +#include <linux/types.h>
 +#include <linux/interrupt.h>
 +#include <linux/list.h>
 +#include <linux/timer.h>
 +#include <linux/init.h>
 +#include <linux/serial_core.h>
 +#include <linux/platform_device.h>
 +#include <linux/device.h>
 +#include <linux/syscore_ops.h>
 +#include <linux/clk.h>
 +#include <linux/io.h>
 +
 +#include <asm/mach/arch.h>
 +#include <asm/mach/map.h>
 +#include <asm/mach/irq.h>
 +
 +#include <mach/hardware.h>
 +#include <asm/irq.h>
 +
 +#include <plat/cpu-freq.h>
 +
 +#include <mach/regs-clock.h>
 +#include <plat/regs-serial.h>
 +#include <mach/regs-gpio.h>
 +#include <mach/regs-gpioj.h>
 +#include <mach/regs-dsc.h>
 +
 +#include <plat/s3c2410.h>
 +#include <plat/s3c244x.h>
 +#include <plat/clock.h>
 +#include <plat/devs.h>
 +#include <plat/cpu.h>
 +#include <plat/pm.h>
 +#include <plat/pll.h>
 +#include <plat/nand-core.h>
++#include <plat/watchdog-reset.h>
 +
 +static struct map_desc s3c244x_iodesc[] __initdata = {
 +      IODESC_ENT(CLKPWR),
 +      IODESC_ENT(TIMER),
 +      IODESC_ENT(WATCHDOG),
 +};
 +
 +/* uart initialisation */
 +
 +void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 +{
 +      s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
 +}
 +
 +void __init s3c244x_map_io(void)
 +{
 +      /* register our io-tables */
 +
 +      iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
 +
 +      /* rename any peripherals used differing from the s3c2410 */
 +
 +      s3c_device_sdi.name  = "s3c2440-sdi";
 +      s3c_device_i2c0.name  = "s3c2440-i2c";
 +      s3c_nand_setname("s3c2440-nand");
 +      s3c_device_ts.name = "s3c2440-ts";
 +      s3c_device_usbgadget.name = "s3c2440-usbgadget";
 +}
 +
 +void __init_or_cpufreq s3c244x_setup_clocks(void)
 +{
 +      struct clk *xtal_clk;
 +      unsigned long clkdiv;
 +      unsigned long camdiv;
 +      unsigned long xtal;
 +      unsigned long hclk, fclk, pclk;
 +      int hdiv = 1;
 +
 +      xtal_clk = clk_get(NULL, "xtal");
 +      xtal = clk_get_rate(xtal_clk);
 +      clk_put(xtal_clk);
 +
 +      fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
 +
 +      clkdiv = __raw_readl(S3C2410_CLKDIVN);
 +      camdiv = __raw_readl(S3C2440_CAMDIVN);
 +
 +      /* work out clock scalings */
 +
 +      switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
 +      case S3C2440_CLKDIVN_HDIVN_1:
 +              hdiv = 1;
 +              break;
 +
 +      case S3C2440_CLKDIVN_HDIVN_2:
 +              hdiv = 2;
 +              break;
 +
 +      case S3C2440_CLKDIVN_HDIVN_4_8:
 +              hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
 +              break;
 +
 +      case S3C2440_CLKDIVN_HDIVN_3_6:
 +              hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
 +              break;
 +      }
 +
 +      hclk = fclk / hdiv;
 +      pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
 +
 +      /* print brief summary of clocks, etc */
 +
 +      printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
 +             print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
 +
 +      s3c24xx_setup_clocks(fclk, hclk, pclk);
 +}
 +
 +void __init s3c244x_init_clocks(int xtal)
 +{
 +      /* initialise the clocks here, to allow other things like the
 +       * console to use them, and to add new ones after the initialisation
 +       */
 +
 +      s3c24xx_register_baseclocks(xtal);
 +      s3c244x_setup_clocks();
 +      s3c2410_baseclk_add();
 +}
 +
 +/* Since the S3C2442 and S3C2440 share items, put both subsystems here */
 +
 +struct bus_type s3c2440_subsys = {
 +      .name           = "s3c2440-core",
 +      .dev_name       = "s3c2440-core",
 +};
 +
 +struct bus_type s3c2442_subsys = {
 +      .name           = "s3c2442-core",
 +      .dev_name       = "s3c2442-core",
 +};
 +
 +/* need to register the subsystem before we actually register the device, and
 + * we also need to ensure that it has been initialised before any of the
 + * drivers even try to use it (even if not on an s3c2440 based system)
 + * as a driver which may support both 2410 and 2440 may try and use it.
 +*/
 +
 +static int __init s3c2440_core_init(void)
 +{
 +      return subsys_system_register(&s3c2440_subsys, NULL);
 +}
 +
 +core_initcall(s3c2440_core_init);
 +
 +static int __init s3c2442_core_init(void)
 +{
 +      return subsys_system_register(&s3c2442_subsys, NULL);
 +}
 +
 +core_initcall(s3c2442_core_init);
 +
 +
 +#ifdef CONFIG_PM
 +static struct sleep_save s3c244x_sleep[] = {
 +      SAVE_ITEM(S3C2440_DSC0),
 +      SAVE_ITEM(S3C2440_DSC1),
 +      SAVE_ITEM(S3C2440_GPJDAT),
 +      SAVE_ITEM(S3C2440_GPJCON),
 +      SAVE_ITEM(S3C2440_GPJUP)
 +};
 +
 +static int s3c244x_suspend(void)
 +{
 +      s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
 +      return 0;
 +}
 +
 +static void s3c244x_resume(void)
 +{
 +      s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
 +}
 +#else
 +#define s3c244x_suspend NULL
 +#define s3c244x_resume  NULL
 +#endif
 +
 +struct syscore_ops s3c244x_pm_syscore_ops = {
 +      .suspend        = s3c244x_suspend,
 +      .resume         = s3c244x_resume,
 +};
++
++void s3c244x_restart(char mode, const char *cmd)
++{
++      if (mode == 's')
++              soft_restart(0);
++
++      arch_wdt_reset();
++
++      /* we'll take a jump through zero as a poor second */
++      soft_restart(0);
++}
Simple merge
Simple merge