clk: renesas: r8a7796: Add EHCI/OHCI clocks
authorKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Wed, 19 Apr 2017 17:46:27 +0000 (02:46 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 15 May 2017 07:46:31 +0000 (09:46 +0200)
This patch adds EHCI/OHCI{0,1} clocks for R8A7796 SoC.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7796-cpg-mssr.c

index 1d8c5c2b6174c9359407825e71bce2726b5e48dc..c6c50266d85e0dfef8fea76ed9d3113482cac10b 100644 (file)
@@ -165,6 +165,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("vspd0",                 623,   R8A7796_CLK_S0D2),
        DEF_MOD("vspb",                  626,   R8A7796_CLK_S0D1),
        DEF_MOD("vspi0",                 631,   R8A7796_CLK_S0D1),
+       DEF_MOD("ehci1",                 702,   R8A7796_CLK_S3D4),
+       DEF_MOD("ehci0",                 703,   R8A7796_CLK_S3D4),
        DEF_MOD("csi20",                 714,   R8A7796_CLK_CSI0),
        DEF_MOD("csi40",                 716,   R8A7796_CLK_CSI0),
        DEF_MOD("du2",                   722,   R8A7796_CLK_S2D1),