arm: dts: qcom: Add LPASS Audio HW to IPQ8064 device tree

Model the Qualcomm Technologies LPASS hardware for the ipq806x SOC.

Signed-off-by: Kenneth Westfield <kwestfie@codeaurora.org>
Acked-by: Banajit Goswami <bgoswami@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 5afaff950c89503912eff028f5c8c0a02d79ca28..1bc5fdd0e4b36486e0d0cc7e8809c88616d76435 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -2,6 +2,7 @@
 
 #include "skeleton.dtsi"
 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
+#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
 #include <dt-bindings/soc/qcom,gsbi.h>
 
 / {
@@ -66,6 +67,21 @@
                ranges;
                compatible = "simple-bus";
 
+               lpass@28100000 {
+                       compatible = "qcom,lpass-cpu";
+                       status = "disabled";
+                       clocks = <&lcc AHBIX_CLK>,
+                                       <&lcc MI2S_OSR_CLK>,
+                                       <&lcc MI2S_BIT_CLK>;
+                       clock-names = "ahbix-clk",
+                                       "mi2s-osr-clk",
+                                       "mi2s-bit-clk";
+                       interrupts = <0 85 1>;
+                       interrupt-names = "lpass-irq-lpaif";
+                       reg = <0x28100000 0x10000>;
+                       reg-names = "lpass-lpaif";
+               };
+
                qcom_pinmux: pinmux@800000 {
                        compatible = "qcom,ipq8064-pinctrl";
                        reg = <0x800000 0x4000>;