crypto: qat - add support for MMP FW

Load Modular Math Processor(MMP) firmware into QAT devices to support
public key algorithm acceleration.

Signed-off-by: Pingchao Yang <pingchao.yang@intel.com>
Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h
index 5fe90296762083e12690e70ace018b273d9e5569..91c969eb6e6b036b654b29cb5a34de03a702f3aa 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_accel_devices.h
+++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h
@@ -135,6 +135,7 @@ struct adf_hw_device_data {
        struct adf_hw_device_class *dev_class;
        uint32_t (*get_accel_mask)(uint32_t fuse);
        uint32_t (*get_ae_mask)(uint32_t fuse);
+       uint32_t (*get_sram_bar_id)(struct adf_hw_device_data *self);
        uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
        uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
        uint32_t (*get_num_aes)(struct adf_hw_device_data *self);

diff --git a/drivers/crypto/qat/qat_common/adf_common_drv.h b/drivers/crypto/qat/qat_common/adf_common_drv.h
index 27e16c09230bffa24e505a03c8848fc7ab2bb40d..1e82ad4bf43d5d41e6bce18bc22e039ec987673d 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_common_drv.h
+++ b/drivers/crypto/qat/qat_common/adf_common_drv.h
@@ -196,4 +196,6 @@ int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
 void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle);
 int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,
                         void *addr_ptr, int mem_size);
+void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
+                       void *addr_ptr, int mem_size);
 #endif

diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c
index 274ff7e9de6e9cfa165a8c99297cfada512bc794..1d6d28916590d008cadea54be6776e6ade6f9d00 100644 (file)
--- a/drivers/crypto/qat/qat_common/qat_hal.c
+++ b/drivers/crypto/qat/qat_common/qat_hal.c
@@ -679,21 +679,24 @@ int qat_hal_init(struct adf_accel_dev *accel_dev)
        struct icp_qat_fw_loader_handle *handle;
        struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev;
        struct adf_hw_device_data *hw_data = accel_dev->hw_device;
-       struct adf_bar *bar =
+       struct adf_bar *misc_bar =
                        &pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)];
+       struct adf_bar *sram_bar =
+                       &pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)];
 
        handle = kzalloc(sizeof(*handle), GFP_KERNEL);
        if (!handle)
                return -ENOMEM;
 
-       handle->hal_cap_g_ctl_csr_addr_v = bar->virt_addr +
+       handle->hal_cap_g_ctl_csr_addr_v = misc_bar->virt_addr +
                                                ICP_DH895XCC_CAP_OFFSET;
-       handle->hal_cap_ae_xfer_csr_addr_v = bar->virt_addr +
+       handle->hal_cap_ae_xfer_csr_addr_v = misc_bar->virt_addr +
                                                ICP_DH895XCC_AE_OFFSET;
-       handle->hal_ep_csr_addr_v = bar->virt_addr + ICP_DH895XCC_EP_OFFSET;
+       handle->hal_ep_csr_addr_v = misc_bar->virt_addr +
+                                   ICP_DH895XCC_EP_OFFSET;
        handle->hal_cap_ae_local_csr_addr_v =
                handle->hal_cap_ae_xfer_csr_addr_v + LOCAL_TO_XFER_REG_OFFSET;
-
+       handle->hal_sram_addr_v = sram_bar->virt_addr;
        handle->hal_handle = kzalloc(sizeof(*handle->hal_handle), GFP_KERNEL);
        if (!handle->hal_handle)
                goto out_hal_handle;

diff --git a/drivers/crypto/qat/qat_common/qat_uclo.c b/drivers/crypto/qat/qat_common/qat_uclo.c
index 1e27f9f7fddf64dbb5ed959305dc93aa7c894fda..c48f181e894157a1c8767d64d4ecf00975bd1ef6 100644 (file)
--- a/drivers/crypto/qat/qat_common/qat_uclo.c
+++ b/drivers/crypto/qat/qat_common/qat_uclo.c
@@ -359,28 +359,7 @@ static int qat_uclo_init_umem_seg(struct icp_qat_fw_loader_handle *handle,
 static int qat_uclo_init_ae_memory(struct icp_qat_fw_loader_handle *handle,
                                   struct icp_qat_uof_initmem *init_mem)
 {
-       unsigned int i;
-       struct icp_qat_uof_memvar_attr *mem_val_attr;
-
-       mem_val_attr =
-               (struct icp_qat_uof_memvar_attr *)((unsigned long)init_mem +
-               sizeof(struct icp_qat_uof_initmem));
-
        switch (init_mem->region) {
-       case ICP_QAT_UOF_SRAM_REGION:
-               if ((init_mem->addr + init_mem->num_in_bytes) >
-                   ICP_DH895XCC_PESRAM_BAR_SIZE) {
-                       pr_err("QAT: initmem on SRAM is out of range");
-                       return -EINVAL;
-               }
-               for (i = 0; i < init_mem->val_attr_num; i++) {
-                       qat_uclo_wr_sram_by_words(handle,
-                                                 init_mem->addr +
-                                                 mem_val_attr->offset_in_byte,
-                                                 &mem_val_attr->value, 4);
-                       mem_val_attr++;
-               }
-               break;
        case ICP_QAT_UOF_LMEM_REGION:
                if (qat_uclo_init_lmem_seg(handle, init_mem))
                        return -EINVAL;
@@ -990,6 +969,12 @@ out_err:
        return -EFAULT;
 }
 
+void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
+                       void *addr_ptr, int mem_size)
+{
+       qat_uclo_wr_sram_by_words(handle, 0, addr_ptr, ALIGN(mem_size, 4));
+}
+
 int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,
                         void *addr_ptr, int mem_size)
 {

diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
index b1386922d7a2a7c0aaf6bf06c52c1a860ffd12bf..7093fc0fe8da2e32883ff2fbecd14c27a9fb6d90 100644 (file)
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
@@ -117,6 +117,11 @@ static uint32_t get_etr_bar_id(struct adf_hw_device_data *self)
        return ADF_DH895XCC_ETR_BAR;
 }
 
+static uint32_t get_sram_bar_id(struct adf_hw_device_data *self)
+{
+       return ADF_DH895XCC_SRAM_BAR;
+}
+
 static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
 {
        int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK)
@@ -219,6 +224,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
        hw_data->get_num_aes = get_num_aes;
        hw_data->get_etr_bar_id = get_etr_bar_id;
        hw_data->get_misc_bar_id = get_misc_bar_id;
+       hw_data->get_sram_bar_id = get_sram_bar_id;
        hw_data->get_sku = get_sku;
        hw_data->fw_name = ADF_DH895XCC_FW;
        hw_data->init_admin_comms = adf_init_admin_comms;

diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
index 25269a9f24a2bca0cb41e095668589b609a462ff..87fb1fadb4b2ec22fefe317cfcd5e8f068f60bc1 100644 (file)
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
@@ -48,6 +48,7 @@
 #define ADF_DH895x_HW_DATA_H_
 
 /* PCIe configuration space */
+#define ADF_DH895XCC_SRAM_BAR 0
 #define ADF_DH895XCC_PMISC_BAR 1
 #define ADF_DH895XCC_ETR_BAR 2
 #define ADF_DH895XCC_RX_RINGS_OFFSET 8