drm/nouveau: silence sparse warnings about symbols not being marked static
authorBen Skeggs <bskeggs@redhat.com>
Fri, 4 Nov 2016 01:44:21 +0000 (11:44 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Mon, 7 Nov 2016 04:04:40 +0000 (14:04 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
33 files changed:
drivers/gpu/drm/nouveau/include/nvkm/subdev/fb.h
drivers/gpu/drm/nouveau/nouveau_connector.h
drivers/gpu/drm/nouveau/nouveau_drm.c
drivers/gpu/drm/nouveau/nvif/client.c
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/gt215.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/disp/coreg94.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp104.c
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk104.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk110.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk208.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgf117.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk104.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk110.fuc3.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgk208.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/hubgm107.fuc5.h
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
drivers/gpu/drm/nouveau/nvkm/engine/pm/gf100.c
drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/g98.fuc0s.h
drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c
drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/g84.c
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf100.fuc3.h
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gf119.fuc4.h
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gk208.fuc5.h
drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/gt215.fuc3.h
drivers/gpu/drm/nouveau/nvkm/subdev/volt/gm20b.c

index cf681065863e5370cbdf67802d2fb41b7e2b0014..65ce79a85d3791046ec021792f28481e9ffd86e9 100644 (file)
@@ -157,4 +157,6 @@ struct nvkm_ram_func {
        int (*prog)(struct nvkm_ram *);
        void (*tidy)(struct nvkm_ram *);
 };
+
+extern const u8 gf100_pte_storage_type_map[256];
 #endif
index 7446ee66ea041c2dd9fc3b0444db5309dbcfcdc9..43b9583304d0b2816d9a32be42e5623576861438 100644 (file)
@@ -109,5 +109,6 @@ nouveau_connector_create(struct drm_device *, int index);
 extern int nouveau_tv_disable;
 extern int nouveau_ignorelid;
 extern int nouveau_duallink;
+extern int nouveau_hdmimhz;
 
 #endif /* __NOUVEAU_CONNECTOR_H__ */
index 6adf9478941737ca56ce17304666a91a974e0aa2..62288152c8423b55d0886463812497b5c27ce63b 100644 (file)
@@ -1037,6 +1037,7 @@ static void nouveau_display_options(void)
        DRM_DEBUG_DRIVER("... modeset      : %d\n", nouveau_modeset);
        DRM_DEBUG_DRIVER("... runpm        : %d\n", nouveau_runtime_pm);
        DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
+       DRM_DEBUG_DRIVER("... hdmimhz      : %d\n", nouveau_hdmimhz);
 }
 
 static const struct dev_pm_ops nouveau_pm_ops = {
index 1ee9294eca2eac27070ded42a200d9e45a50dc49..29c20dfd894d585d29da3b8e9bad952b340f1aa7 100644 (file)
@@ -55,7 +55,7 @@ nvif_client_fini(struct nvif_client *client)
        }
 }
 
-const struct nvif_driver *
+static const struct nvif_driver *
 nvif_drivers[] = {
 #ifdef __KERNEL__
        &nvif_driver_nvkm,
index 05bb65608dfe1c655dadb97d5fb1ed476d3fa32a..d9ca9636a3e328226b91906adba92b1932706de3 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_ce_data[] = {
+static uint32_t gf100_ce_data[] = {
 /* 0x0000: ctx_object */
        0x00000000,
 /* 0x0004: ctx_query_address_high */
@@ -171,7 +171,7 @@ uint32_t gf100_ce_data[] = {
        0x00000800,
 };
 
-uint32_t gf100_ce_code[] = {
+static uint32_t gf100_ce_code[] = {
 /* 0x0000: main */
        0x04fe04bd,
        0x3517f000,
index 972281d10f38947ce881e176736eedb272465a1c..f0a1cf31c7ca3353c49dc642b63a229b9786c5ed 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gt215_ce_data[] = {
+static uint32_t gt215_ce_data[] = {
 /* 0x0000: ctx_object */
        0x00000000,
 /* 0x0004: ctx_dma */
@@ -183,7 +183,7 @@ uint32_t gt215_ce_data[] = {
        0x00000800,
 };
 
-uint32_t gt215_ce_code[] = {
+static uint32_t gt215_ce_code[] = {
 /* 0x0000: main */
        0x04fe04bd,
        0x3517f000,
index 019379a3a01cb35b1447b569105b9e64a5a20cea..c65c9f3ff69fb0dad71f288ec3ff0b2a6859bb56 100644 (file)
@@ -26,7 +26,7 @@
 
 #include <nvif/class.h>
 
-const struct nv50_disp_mthd_list
+static const struct nv50_disp_mthd_list
 g94_disp_core_mthd_sor = {
        .mthd = 0x0040,
        .addr = 0x000008,
@@ -43,8 +43,8 @@ g94_disp_core_chan_mthd = {
        .prev = 0x000004,
        .data = {
                { "Global", 1, &nv50_disp_core_mthd_base },
-               {    "DAC", 3, &g84_disp_core_mthd_dac  },
-               {    "SOR", 4, &g94_disp_core_mthd_sor  },
+               {    "DAC", 3, &g84_disp_core_mthd_dac },
+               {    "SOR", 4, &g94_disp_core_mthd_sor },
                {   "PIOR", 3, &nv50_disp_core_mthd_pior },
                {   "HEAD", 2, &g84_disp_core_mthd_head },
                {}
index 6922f4007b611e05986adc963ca32014d11eea29..e356f87fbe603c933c870d7ae78f42108a73cef0 100644 (file)
@@ -59,7 +59,7 @@ gp104_disp_core_init(struct nv50_disp_dmac *chan)
        return 0;
 }
 
-const struct nv50_disp_dmac_func
+static const struct nv50_disp_dmac_func
 gp104_disp_core_func = {
        .init = gp104_disp_core_init,
        .fini = gf119_disp_core_fini,
index 8cb240b65ec2003ba31e71d817d6a55ee3986e42..12a703fe355d32c01db0a5c97e1d78884d461df6 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_grgpc_data[] = {
+static uint32_t gf100_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x00000064,
 /* 0x0004: gpc_mmio_list_tail */
@@ -36,7 +36,7 @@ uint32_t gf100_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gf100_grgpc_code[] = {
+static uint32_t gf100_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 550d6ba0933b5ffdf99a97eae9dc3838b3948285..ffbfc51200f19e6fbcac7e78977ca3f5f1ed094c 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf117_grgpc_data[] = {
+static uint32_t gf117_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gf117_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gf117_grgpc_code[] = {
+static uint32_t gf117_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 271b59d365e5478570b95ae5673307c970e4f812..357f662de5718446e8720c25e49a4965166469c9 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk104_grgpc_data[] = {
+static uint32_t gk104_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gk104_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gk104_grgpc_code[] = {
+static uint32_t gk104_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 73b4a32c5d2903cd2f3fd5f10ccb953366031c4c..4ffc8212a85c99e7a7b772bf225c045a1a13b898 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk110_grgpc_data[] = {
+static uint32_t gk110_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gk110_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gk110_grgpc_code[] = {
+static uint32_t gk110_grgpc_code[] = {
        0x03a10ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 01816981831738d33446d7f9eda23c34f6507606..09196206c9bcfc7993820932e18200932f7968fe 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk208_grgpc_data[] = {
+static uint32_t gk208_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gk208_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gk208_grgpc_code[] = {
+static uint32_t gk208_grgpc_code[] = {
        0x03140ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index eca007f03fa9698b496d014fd5664f57a17fdaa0..6d7d004363d91c64657b5847611c87783ed22108 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gm107_grgpc_data[] = {
+static uint32_t gm107_grgpc_data[] = {
 /* 0x0000: gpc_mmio_list_head */
        0x0000006c,
 /* 0x0004: gpc_mmio_list_tail */
@@ -40,7 +40,7 @@ uint32_t gm107_grgpc_data[] = {
        0x00000000,
 };
 
-uint32_t gm107_grgpc_code[] = {
+static uint32_t gm107_grgpc_code[] = {
        0x03410ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 8015b40a61d69de7863dac560b531b1dc3f090b3..7538404b8b134deb5659b84ba9b1d1ee20f4fd33 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_grhub_data[] = {
+static uint32_t gf100_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gf100_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gf100_grhub_code[] = {
+static uint32_t gf100_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 2af90ec6852a0e5ab5f5514c1981153a61a91fc7..ce000a47ec6dbacd2260aca36e6f1fe4822282df 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf117_grhub_data[] = {
+static uint32_t gf117_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gf117_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gf117_grhub_code[] = {
+static uint32_t gf117_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index e8b8c1c94700fc365e3187ec728365f4cf73d4af..1f26cb6a233c89e06cc8654b2f9a4a188b4a8f4a 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk104_grhub_data[] = {
+static uint32_t gk104_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gk104_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gk104_grhub_code[] = {
+static uint32_t gk104_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index f4ed2fb6f714d3f8ddf202bf07fb8ebdf07e8898..70436d93efe37097662a22283128b6c8e429dc82 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk110_grhub_data[] = {
+static uint32_t gk110_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gk110_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gk110_grhub_code[] = {
+static uint32_t gk110_grhub_code[] = {
        0x039b0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index ed488973c1179ddbf4365a6e7e014d0782dbb2a6..e0933a07426addbec7fae172660fd0237d1fe2c8 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk208_grhub_data[] = {
+static uint32_t gk208_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gk208_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gk208_grhub_code[] = {
+static uint32_t gk208_grhub_code[] = {
        0x030e0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 5c9051839557f03cc5f90955763590b75ade6d57..9b432823bcbe0c30f1b980ad7eb0825fafc828b3 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gm107_grhub_data[] = {
+static uint32_t gm107_grhub_data[] = {
 /* 0x0000: hub_mmio_list_head */
        0x00000300,
 /* 0x0004: hub_mmio_list_tail */
@@ -205,7 +205,7 @@ uint32_t gm107_grhub_data[] = {
        0x0417e91c,
 };
 
-uint32_t gm107_grhub_code[] = {
+static uint32_t gm107_grhub_code[] = {
        0x030e0ef5,
 /* 0x0004: queue_put */
        0x9800d898,
index 70335f65c51efbe7d4b1293e9ef2ec2dd67e3279..0124e468086ebbcaec0954105a83167ef720e992 100644 (file)
@@ -102,7 +102,7 @@ gf117_gr_pack_mmio[] = {
 
 #include "fuc/hubgf117.fuc3.h"
 
-struct gf100_gr_ucode
+static struct gf100_gr_ucode
 gf117_gr_fecs_ucode = {
        .code.data = gf117_grhub_code,
        .code.size = sizeof(gf117_grhub_code),
@@ -112,7 +112,7 @@ gf117_gr_fecs_ucode = {
 
 #include "fuc/gpcgf117.fuc3.h"
 
-struct gf100_gr_ucode
+static struct gf100_gr_ucode
 gf117_gr_gpccs_ucode = {
        .code.data = gf117_grgpc_code,
        .code.size = sizeof(gf117_grgpc_code),
index d2901e9a78088a28e0c46ae38da64cbeb1c252eb..fe2532ee4145b33effa772d583426dcd646eb39d 100644 (file)
@@ -102,7 +102,7 @@ gf100_pm_gpc[] = {
        {}
 };
 
-const struct nvkm_specdom
+static const struct nvkm_specdom
 gf100_pm_part[] = {
        { 0xe0, (const struct nvkm_specsig[]) {
                        { 0x0f, "part00_pbfb_00", gf100_pbfb_sources },
index eca62221f29933e3a503f9495fb0e2ca47ff9155..4b57f8814560d5876aa42b8a89a78cc93b41313d 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t g98_sec_data[] = {
+static uint32_t g98_sec_data[] = {
 /* 0x0000: ctx_dma */
 /* 0x0000: ctx_dma_query */
        0x00000000,
@@ -150,7 +150,7 @@ uint32_t g98_sec_data[] = {
        0x00000000,
 };
 
-uint32_t g98_sec_code[] = {
+static uint32_t g98_sec_code[] = {
        0x17f004bd,
        0x0010fe35,
        0xf10004fe,
index 772425ca5a9eae5a50715a03c8cf0265cd9753de..093223d1df4fd67b0139e318ed3a1cfcfafeb38b 100644 (file)
@@ -420,8 +420,6 @@ gf100_ram_tidy(struct nvkm_ram *base)
        ram_exec(&ram->fuc, false);
 }
 
-extern const u8 gf100_pte_storage_type_map[256];
-
 void
 gf100_ram_put(struct nvkm_ram *ram, struct nvkm_mem **pmem)
 {
index f0851d57df2f2df790bc2b3a6949118944984ae9..01d5c5a56e2ee7761bb44e40bf892e8df3c64b2e 100644 (file)
@@ -74,7 +74,7 @@ nvkm_i2c_aux_i2c_func(struct i2c_adapter *adap)
        return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
 }
 
-const struct i2c_algorithm
+static const struct i2c_algorithm
 nvkm_i2c_aux_i2c_algo = {
        .master_xfer = nvkm_i2c_aux_i2c_xfer,
        .functionality = nvkm_i2c_aux_i2c_func
index 658355fc9354fd7466a731fa5637d2443d5e544f..f0af2a381eea0b56529300183aa200cea69c0dd2 100644 (file)
@@ -288,7 +288,8 @@ nvkm_iccsense_init(struct nvkm_subdev *subdev)
        return 0;
 }
 
-struct nvkm_subdev_func iccsense_func = {
+static const struct nvkm_subdev_func
+iccsense_func = {
        .oneinit = nvkm_iccsense_oneinit,
        .init = nvkm_iccsense_init,
        .dtor = nvkm_iccsense_dtor,
index 8ed8f65ff664f5b0014f7326923dd079a3188f0e..10c987a654ec5c95354e92b5e96435e0a8b8d5b0 100644 (file)
@@ -104,7 +104,7 @@ nvkm_instobj_dtor(struct nvkm_memory *memory)
        return iobj;
 }
 
-const struct nvkm_memory_func
+static const struct nvkm_memory_func
 nvkm_instobj_func = {
        .dtor = nvkm_instobj_dtor,
        .target = nvkm_instobj_target,
@@ -156,7 +156,7 @@ nvkm_instobj_wr32_slow(struct nvkm_memory *memory, u64 offset, u32 data)
        return nvkm_wo32(iobj->parent, offset, data);
 }
 
-const struct nvkm_memory_func
+static const struct nvkm_memory_func
 nvkm_instobj_func_slow = {
        .dtor = nvkm_instobj_dtor,
        .target = nvkm_instobj_target,
index c3d66ef5dc129877607cbbbce62f02b39054cbf7..430a61c3df4450bf6cd1a5e69034705a2ccacec6 100644 (file)
@@ -34,7 +34,7 @@ g84_mc_reset[] = {
        {}
 };
 
-const struct nvkm_mc_map
+static const struct nvkm_mc_map
 g84_mc_intr[] = {
        { 0x04000000, NVKM_ENGINE_DISP },
        { 0x00020000, NVKM_ENGINE_VP },
index e2faccffee6f3a5a7cdb35e15c88b02b27ced639..0bcf0b307a61ef5f4b791283db36e349b6126190 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf100_pmu_data[] = {
+static uint32_t gf100_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -916,7 +916,7 @@ uint32_t gf100_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gf100_pmu_code[] = {
+static uint32_t gf100_pmu_code[] = {
        0x03920ef5,
 /* 0x0004: rd32 */
        0x07a007f1,
index 2d5bdc539697a2fc1202c23f2d48010eccf3c330..fe8905666c6786b16dc2ea1a54f159b96879bce5 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gf119_pmu_data[] = {
+static uint32_t gf119_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -915,7 +915,7 @@ uint32_t gf119_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gf119_pmu_code[] = {
+static uint32_t gf119_pmu_code[] = {
        0x03410ef5,
 /* 0x0004: rd32 */
        0x07a007f1,
index 3c731ff12871bf97d42692c7821dacec191f2920..9cf4e6fc724e7b8ab9a78df04779c3c7cae7c945 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gk208_pmu_data[] = {
+static uint32_t gk208_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -915,7 +915,7 @@ uint32_t gk208_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gk208_pmu_code[] = {
+static uint32_t gk208_pmu_code[] = {
        0x02f90ef5,
 /* 0x0004: rd32 */
        0xf607a040,
index e83341815ec6c961cc3e681e81d832b98adfa984..5d692425b190ffb7893f311f94b4065e28d70580 100644 (file)
@@ -1,4 +1,4 @@
-uint32_t gt215_pmu_data[] = {
+static uint32_t gt215_pmu_data[] = {
 /* 0x0000: proc_kern */
        0x52544e49,
        0x00000000,
@@ -916,7 +916,7 @@ uint32_t gt215_pmu_data[] = {
        0x00000000,
 };
 
-uint32_t gt215_pmu_code[] = {
+static uint32_t gt215_pmu_code[] = {
        0x03920ef5,
 /* 0x0004: rd32 */
        0x07a007f1,
index 74db4d28930fd410994041a2e927c34d6876cbac..2925b9cae6813fe8c67d5c7ced06d06183c203a0 100644 (file)
@@ -25,7 +25,7 @@
 
 #include <core/tegra.h>
 
-const struct cvb_coef gm20b_cvb_coef[] = {
+static const struct cvb_coef gm20b_cvb_coef[] = {
        /* KHz,             c0,      c1,   c2 */
        /*  76800 */ { 1786666,  -85625, 1632 },
        /* 153600 */ { 1846729,  -87525, 1632 },
@@ -58,7 +58,7 @@ static const struct cvb_coef gm20b_na_cvb_coef[] = {
        /* 998400 */ { 1316991, 8144, -940, 808, -21583, 226 },
 };
 
-const u32 speedo_to_vmin[] = {
+static const u32 speedo_to_vmin[] = {
        /*   0,      1,      2,      3,      4, */
        950000, 840000, 818750, 840000, 810000,
 };