ARM: dts: exynos: Fix initial audio clocks configuration on Exynos4 boards

Move assigned clocks properties from sound node to audio subsystem clock
controller node. This way clocks topology and rates are set just after
probing audio clocks controller. Leaving those properties under
sound node doesn't guarantee to configure them before they are being used
(for example i2s hardware module can be probed in parallel and it also
require proper audio clocks configuration).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts
index 1ac9129cd59bbe74f1644d5cc1cdb7b429f9a8e1..d66093084dbbb0db074aa8f5101aed31ec68cbb1 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
+++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
@@ -82,17 +82,6 @@
                compatible = "simple-audio-card";
                simple-audio-card,name = "wm-sound";
 
-               assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
-                               <&clock_audss EXYNOS_MOUT_I2S>,
-                               <&clock_audss EXYNOS_DOUT_SRP>,
-                               <&clock_audss EXYNOS_DOUT_AUD_BUS>;
-               assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
-                               <&clock_audss EXYNOS_MOUT_AUDSS>;
-               assigned-clock-rates = <0>,
-                               <0>,
-                               <112896000>,
-                               <11289600>;
-
                simple-audio-card,format = "i2s";
                simple-audio-card,bitclock-master = <&link0_codec>;
                simple-audio-card,frame-master = <&link0_codec>;
@@ -145,6 +134,16 @@
        status = "okay";
 };
 
+&clock_audss {
+       assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
+                       <&clock_audss EXYNOS_MOUT_I2S>,
+                       <&clock_audss EXYNOS_DOUT_SRP>,
+                       <&clock_audss EXYNOS_DOUT_AUD_BUS>;
+       assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
+                       <&clock_audss EXYNOS_MOUT_AUDSS>;
+       assigned-clock-rates = <0>, <0>, <112896000>, <11289600>;
+};
+
 &ehci {
        status = "okay";
        /* In order to reset USB ethernet */

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 7815efd5a52f645225bc13e91dba66bce8382034..b6b0f509f07c55f8aabfde425dc1ea130bf2d9b8 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -43,16 +43,6 @@
 
        sound: sound {
                compatible = "simple-audio-card";
-               assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
-                               <&clock_audss EXYNOS_MOUT_I2S>,
-                               <&clock_audss EXYNOS_DOUT_SRP>,
-                               <&clock_audss EXYNOS_DOUT_AUD_BUS>;
-               assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
-                               <&clock_audss EXYNOS_MOUT_AUDSS>;
-               assigned-clock-rates = <0>,
-                               <0>,
-                               <192000000>,
-                               <19200000>;
 
                simple-audio-card,format = "i2s";
                simple-audio-card,bitclock-master = <&link0_codec>;
@@ -157,6 +147,16 @@
        status = "okay";
 };
 
+&clock_audss {
+       assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
+                       <&clock_audss EXYNOS_MOUT_I2S>,
+                       <&clock_audss EXYNOS_DOUT_SRP>,
+                       <&clock_audss EXYNOS_DOUT_AUD_BUS>;
+       assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
+                       <&clock_audss EXYNOS_MOUT_AUDSS>;
+       assigned-clock-rates = <0>, <0>, <192000000>, <19200000>;
+};
+
 &cpu0 {
        cpu0-supply = <&buck2_reg>;
 };