{VIASR, SR1B, 0xFF, 0xF0},
{VIASR, SR1E, 0xFF, 0x01},
{VIASR, SR2A, 0xFF, 0x00},
- {VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */
+ {VIASR, SR2D, 0xC0, 0xC0}, /* delayed E3_ECK */
-{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
-{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
-{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
-{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
{VIACR, CR32, 0xFF, 0x00},
{VIACR, CR33, 0xFF, 0x00},
{VIACR, CR35, 0xFF, 0x00},
{VIASR, SR2A, 0xF0, 0x00},
{VIASR, SR58, 0xFF, 0x00},
{VIASR, SR59, 0xFF, 0x00},
- {VIASR, SR2D, 0xFF, 0xFF}, /* VCK and LCK PLL power on. */
+ {VIASR, SR2D, 0xC0, 0xC0}, /* delayed E3_ECK */
-{VIACR, CR09, 0xFF, 0x00}, /* Initial CR09=0*/
-{VIACR, CR11, 0x8F, 0x00}, /* IGA1 initial Vertical end */
-{VIACR, CR17, 0x7F, 0x00}, /* IGA1 CRT Mode control init */
-{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
-{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
-{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
-{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
{VIACR, CR32, 0xFF, 0x00},
{VIACR, CR33, 0x7F, 0x00},
{VIACR, CR35, 0xFF, 0x00},