sh: clkfwk: Build fix for non-legacy CPG changes.

The disabling of the init op for non-legacy clocks neglected to do the
same in the core clock framework, resulting in a build failure. Fix it
up.

Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

diff --git a/drivers/sh/clk/core.c b/drivers/sh/clk/core.c
index 87743e7d4d42f8e5e17c168c4c6ecf55c5816e1c..3f5e387ed56486ba5c454f4a809a9a57d84d80d5 100644 (file)
--- a/drivers/sh/clk/core.c
+++ b/drivers/sh/clk/core.c
@@ -418,8 +418,11 @@ int clk_register(struct clk *clk)
                list_add(&clk->sibling, &root_clks);
 
        list_add(&clk->node, &clock_list);
+
+#ifdef CONFIG_SH_CLK_CPG_LEGACY
        if (clk->ops && clk->ops->init)
                clk->ops->init(clk);
+#endif
 
 out_unlock:
        mutex_unlock(&clock_list_sem);

diff --git a/drivers/sh/clk/cpg.c b/drivers/sh/clk/cpg.c
index 359e9a322c7b00e8b62225b4b0ca6906ef6c9d2b..6172335ae3234b11d2bd37e4b57dad3c9061278c 100644 (file)
--- a/drivers/sh/clk/cpg.c
+++ b/drivers/sh/clk/cpg.c
@@ -131,7 +131,7 @@ static int sh_clk_div6_enable(struct clk *clk)
        unsigned long value;
        int ret;
 
-       ret = sh_clk_div6_set_rate(clk, clk->rate, 0);
+       ret = sh_clk_div6_set_rate(clk, clk->rate);
        if (ret == 0) {
                value = __raw_readl(clk->enable_reg);
                value &= ~0x100; /* clear stop bit to enable clock */