/* PMU admin */
const char *perf_pmu_name(void)
{
- if (metag_pmu)
- return metag_pmu->pmu.name;
+ if (!metag_pmu)
+ return NULL;
- return NULL;
+ return metag_pmu->name;
}
EXPORT_SYMBOL_GPL(perf_pmu_name);
switch (event->attr.type) {
case PERF_TYPE_HARDWARE:
case PERF_TYPE_HW_CACHE:
+ case PERF_TYPE_RAW:
err = _hw_perf_event_init(event);
break;
if (err)
return err;
break;
+
+ case PERF_TYPE_RAW:
+ mapping = attr->config;
+ break;
}
/* Return early if the event is unsupported */
/* Check for a core internal or performance channel event. */
if (tmp) {
- void *perf_addr = (void *)PERF_COUNT(idx);
+ void *perf_addr;
/*
* Anything other than a cycle count will write the low-
case 0xf0:
perf_addr = (void *)PERF_CHAN(idx);
break;
+
+ default:
+ perf_addr = NULL;
+ break;
}
- metag_out32((config & 0x0f), perf_addr);
+ if (perf_addr)
+ metag_out32((config & 0x0f), perf_addr);
/*
* Now we use the high nibble as the performance event to
metag_pmu->max_period = 0;
}
- metag_pmu->name = "Meta 2";
+ metag_pmu->name = "meta2";
metag_pmu->version = version;
metag_pmu->pmu = pmu;
}