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drm/i915: Fix inconsistent indentation in intel_pre_enable_lvds()
authorChris Wilson <chris@chris-wilson.co.uk>
Sat, 2 Jul 2016 14:36:05 +0000 (15:36 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Sat, 2 Jul 2016 18:20:13 +0000 (19:20 +0100)
smatch complains:

drivers/gpu/drm/i915/intel_lvds.c:187 intel_pre_enable_lvds() warn:
inconsistent indenting

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1467470166-31717-8-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
drivers/gpu/drm/i915/intel_lvds.c patch | blob | blame | history

diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index c26ffef80692c4818d11f44df94959224f992328..681c6fd72ff6418c2e91e61ef8b39465f289ad60 100644 (file)
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -184,8 +184,8 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder)
         * panels behave in the two modes. For now, let's just maintain the
         * value we got from the BIOS.
         */
-        temp &= ~LVDS_A3_POWER_MASK;
-        temp |= lvds_encoder->a3_power;
+       temp &= ~LVDS_A3_POWER_MASK;
+       temp |= lvds_encoder->a3_power;
 
        /* Set the dithering flag on LVDS as needed, note that there is no
         * special lvds dither control bit on pch-split platforms, dithering is