ASoC: twl6040: Clear interrupt status at boot time
authorJorge Eduardo Candelaria <jorge.candelaria@ti.com>
Sat, 11 Dec 2010 03:06:13 +0000 (21:06 -0600)
committerLiam Girdwood <lrg@slimlogic.co.uk>
Tue, 14 Dec 2010 20:36:58 +0000 (20:36 +0000)
On Phoenix 1.1, the INTID register default value is an invalid
one, causing the interrupt handler to think the phoenix power on
sequence is ready before it actually finishes.

This causes some i2c errors when trying to configure twl.

Signed-off-by: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
Signed-off-by: Margarita Olaya Cabrera <magi.olaya@ti.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
sound/soc/codecs/twl6040.c

index c54350445d0cfef1c189558b885311b43380c152..f5d5f89a2216dca5f9162e9ccecfa6a1b87ba699 100644 (file)
@@ -1152,6 +1152,17 @@ static int twl6040_probe(struct snd_soc_codec *codec)
                        goto gpio2_err;
 
                priv->codec_powered = 0;
+
+               /* enable only codec ready interrupt */
+               twl6040_write(codec, TWL6040_REG_INTMR,
+                                       ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
+
+               /* reset interrupt status to allow correct power up sequence */
+               twl6040_read_reg_volatile(codec, TWL6040_REG_INTID);
+       } else {
+               /* no interrupts at all */
+               twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
+                                               TWL6040_ALLINT_MSK);
        }
 
        if (naudint) {
@@ -1162,16 +1173,6 @@ static int twl6040_probe(struct snd_soc_codec *codec)
                                "twl6040_codec", codec);
                if (ret)
                        goto gpio2_err;
-       } else {
-               if (gpio_is_valid(audpwron)) {
-                       /* enable only codec ready interrupt */
-                       twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
-                                       ~TWL6040_READYMSK & TWL6040_ALLINT_MSK);
-               } else {
-                       /* no interrupts at all */
-                       twl6040_write_reg_cache(codec, TWL6040_REG_INTMR,
-                                               TWL6040_ALLINT_MSK);
-               }
        }
 
        /* init vio registers */